VOL-1460 Typo in core_proxy. Also remove uneeded Makefile entries
Change-Id: Idec05442d13e232ac853a5091cc7839dfd2f4d7b
diff --git a/Makefile b/Makefile
index 32d9d23..f6cf50a 100644
--- a/Makefile
+++ b/Makefile
@@ -120,7 +120,7 @@
COVERAGE_OPTS=--with-coverage --with-xunit --cover-branches --cover-html --cover-html-dir=tmp/cover \
--cover-package=pyvoltha.adapters,pyvoltha.common
-utest-with-coverage: venv protos
+utest-with-coverage: venv
@ echo "Executing all unit tests and producing coverage results"
@ tox -- $(COVERAGE_OPTS)
@@ -128,7 +128,6 @@
find . -name '*.pyc' | xargs rm -f
find . -name 'coverage.xml' | xargs rm -f
find . -name 'nosetests.xml' | xargs rm -f
- make -C pyvoltha/protos clean
rm -rf pyvoltha.egg-info
rm -rf dist
rm -rf .tox