diff --git a/bcm68620_release/release/host_customized/board/wrx/Makefile b/bcm68620_release/release/host_customized/board/wrx/Makefile
new file mode 100644
index 0000000..67d1e07
--- /dev/null
+++ b/bcm68620_release/release/host_customized/board/wrx/Makefile
@@ -0,0 +1,14 @@
+# Maple board specific configurations. Relevant only if working in Linux
+#
+MOD_TYPE = lib
+MOD_NAME = bcm_board
+
+ifeq ("$(OS_KERNEL)", "linux")
+ifeq ("$(ENABLE_CLI)", "y")
+
+MOD_DEPS = cli i2c_devs api_cli bcm_dev_ctrl_linux
+
+srcs = bcmolt_board.c bcmolt_board_cli.c
+endif
+endif
+
diff --git a/bcm68620_release/release/host_customized/board/wrx/bcmolt_board.c b/bcm68620_release/release/host_customized/board/wrx/bcmolt_board.c
new file mode 100644
index 0000000..479c5f9
--- /dev/null
+++ b/bcm68620_release/release/host_customized/board/wrx/bcmolt_board.c
@@ -0,0 +1,702 @@
+/*
+<:copyright-BRCM:2016:DUAL/GPL:standard
+
+   Broadcom Proprietary and Confidential.(c) 2016 Broadcom
+   All Rights Reserved
+
+Unless you and Broadcom execute a separate written software license
+agreement governing use of this software, this software is licensed
+to you under the terms of the GNU General Public License version 2
+(the "GPL"), available at http://www.broadcom.com/licenses/GPLv2.php,
+with the following added to such license:
+
+   As a special exception, the copyright holders of this software give
+   you permission to link this software with independent modules, and
+   to copy and distribute the resulting executable under terms of your
+   choice, provided that you also meet, for each linked independent
+   module, the terms and conditions of the license of that module.
+   An independent module is a module which is not derived from this
+   software.  The special exception does not apply to any modifications
+   of the software.
+
+Not withstanding the above, under no circumstances may you combine
+this software in any way with any other Broadcom software provided
+under a license other than the GPL, without Broadcom's express prior
+written consent.
+
+:>
+*/
+#include <sys/ioctl.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <bcmcli.h>
+#include <bcmolt_i2c_devs_ioctl.h>
+#include <bcmolt_dev_ctrl_ioctl.h>
+#include <bcmolt_api.h>
+#include <bcmolt_model_types.h>
+#include <bcmolt_fld.h>
+#include "bcmolt_board.h"
+#include "bcmolt_dpll_table.h"
+
+#define BCM_I2C_DEV_ADDR_START typedef enum {
+#define BCM_I2C_DEV_ADDR(name, desc, val) name = val,
+#define BCM_I2C_DEV_ADDR_END } bcm_i2c_dev_addr;
+
+#define BCM_FPGA_REG_FPGA_VERSION 0x0
+#define BCM_FPGA_REG_BOARD_CONF 0x1
+#define BCM_FPGA_REG_RESETS 0x2
+/* Enable/disable transceiver */
+#define BCM_FPGA_REG_TRX_ENABLE 0x3
+#define BCM_FPGA_REG_TRX_FAIL 0x4
+/* Is transceiver present ? */
+#define BCM_FPGA_REG_TRX_IS_PRESENT 0x5
+#define BCM_FPGA_REG_CXP_CONTROLS 0x6
+#define BCM_FPGA_REG_SHIFT_REGISTER_DATA 0x7
+#define BCM_FPGA_REG_SHIFT_REGISTER_CONTROL 0x8
+#define BCM_FPGA_REG_LEDS 0x9
+#define BCM_FPGA_REG_DEBUG_LEDS 0xA
+#define BCM_FPGA_REG_GPIO_DIR 0xB
+#define BCM_FPGA_REG_GPIO_INPUT 0xC
+#define BCM_FPGA_REG_GPIO_OUTPUT 0xD
+#define BCM_FPGA_REG_GPIO_IRQ 0xE
+
+#define BCM_FPGA_REG_LOW BCM_FPGA_REG_FPGA_VERSION
+#define BCM_FPGA_REG_HIGH BCM_FPGA_REG_GPIO_IRQ
+
+#define BCM_RST_BIT_DEVICE 0x0
+#define BCM_RST_BIT_PON_DPLL 0x1
+#define BCM_RST_BIT_PM_DPLL 0x2
+#define BCM_RST_BIT_KT2 0x4
+
+#define SVK4_IDENT_FILE                 "/etc/svk4"
+
+#include <bcmolt_i2c_devs_addr.h>
+
+#define MAX_CMD_STR_LEN 1024
+
+/* Since the board driver configuration is specific for Linux, there is no point using OS abstraction layer to perform operations like ioctl(). */
+
+static int maple_i2c_fd;
+static int maple_dev_ctrl_fd;
+
+static bcmos_bool bcm_board_is_svk4(void)
+{
+    bcmos_bool is_svk4 = BCMOS_FALSE;
+    FILE *f = fopen(SVK4_IDENT_FILE, "r");
+    if (f)
+    {
+        is_svk4 = BCMOS_TRUE;
+        fclose(f);
+    }
+    return is_svk4;
+}
+
+static bcmos_errno bcm_access_fpga(void)
+{
+    bcmos_errno rc;
+    if (bcm_board_is_svk4())
+    {
+        rc = bcm_board_dev_change(I2C_SW1_I2C_ADDR);
+        BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_dev_change(I2C_SW1_I2C_ADDR) failed\n");
+        rc = bcm_board_switch_write(0x4);
+        BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_switch_write(1) failed\n");
+    }
+    else
+    {
+        rc = bcm_board_dev_change(I2C_SW0_I2C_ADDR);
+        BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_dev_change(I2C_SW0_I2C_ADDR) failed\n");
+        rc = bcm_board_switch_write(1);
+        BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_switch_write(1) failed\n");
+    }
+    rc = bcm_board_dev_change(FPGA_I2C_ADDR);
+    BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_dev_change(FPGA_I2C_ADDR) failed \n");
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_dev_change(uint32_t addr)
+{
+    int rc;
+    maple_i2c_ioctl_param params =
+    {
+        .addr = addr,
+    };
+
+    rc = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_DEV_CHANGE, &params);
+    BCMOS_TRACE_CHECK_RETURN(rc, BCM_ERR_INTERNAL, "ioctl failed for maple_i2c_fd\n");
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_dev_write(uint32_t count, uint32_t addr, uint32_t val)
+{
+    int rc;
+    maple_i2c_ioctl_param params =
+    {
+        .count = count,
+        .addr = addr,
+        .val = val,
+    };
+
+    rc = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_DEV_WRITE, &params);
+    BCMOS_TRACE_CHECK_RETURN(rc, BCM_ERR_INTERNAL, "ioctl failed for maple_i2c_fd\n");
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_dev_read(uint32_t count, uint32_t addr, uint32_t *val)
+{
+    int rc;
+    maple_i2c_ioctl_param params =
+    {
+        .count = count,
+        .addr = addr,
+    };
+
+    rc = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_DEV_READ, &params);
+    BCMOS_TRACE_CHECK_RETURN(rc, BCM_ERR_INTERNAL, "ioctl failed for maple_i2c_fd\n");
+    *val = params.val;
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_switch_write(uint32_t val)
+{
+    int rc;
+    maple_i2c_ioctl_param params =
+    {
+        .val = val,
+    };
+
+    rc = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_SWITCH_WRITE, &params);
+    BCMOS_TRACE_CHECK_RETURN(rc, BCM_ERR_INTERNAL, "ioctl failed for maple_i2c_fd\n");
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_switch_read(uint32_t *val)
+{
+    int rc;
+    maple_i2c_ioctl_param params = {};
+
+    rc = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_SWITCH_READ, &params);
+    BCMOS_TRACE_CHECK_RETURN(rc, BCM_ERR_INTERNAL, "ioctl failed for maple_i2c_fd\n");
+    *val = params.val;
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_fpga_write(uint32_t addr, uint32_t val)
+{
+    int rc;
+    maple_i2c_ioctl_param params =
+    {
+        .addr = addr,
+        .val = val,
+    };
+
+    rc = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_FPGA_WRITE, &params);
+    BCMOS_TRACE_CHECK_RETURN(rc, BCM_ERR_INTERNAL, "ioctl failed for fpga_write\n");
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_host_event_write(uint32_t val)
+{
+    int rc;
+    dev_ctrl_ioctl_param params =
+    {
+        .event = val,
+    };
+
+    rc = ioctl(maple_dev_ctrl_fd, MAPLE_DEV_CTRL_IOCTL_OP_HOST_EVENT_WRITE, &params);
+    BCMOS_TRACE_CHECK_RETURN(rc, BCM_ERR_INTERNAL, "ioctl failed for host_event_write\n");
+
+#ifdef CONFIG_ONU_SIM
+    /* Raise an interrupt on ext_irq1 for the embedded side. */
+    rc = bcm_board_fpga_gen_gpio_irq(BCMOLT_EXT_IRQ_EXT_IRQ1);
+    BCMOS_TRACE_CHECK_RETURN(rc, BCM_ERR_INTERNAL, "ioctl failed for bcm_board_fpga_gen_gpio_irq\n");
+#endif
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_pci_debug(uint32_t device, uint32_t command, int32_t start, int32_t howmany, uint32_t *dumpptr)
+{
+    int rc;
+    dev_ctrl_ioctl_param params =
+    {
+        .device = device,
+        .dumpptr = dumpptr,
+        .start_index = start,
+        .howmany = howmany
+    };
+
+    rc = ioctl(maple_dev_ctrl_fd, command, &params);
+    BCMOS_TRACE_CHECK_RETURN(rc, BCM_ERR_INTERNAL, "ioctl failed for dev_ctrl\n");
+
+    return BCM_ERR_OK;
+}
+bcmos_errno bcm_board_fpga_read(uint32_t addr, uint32_t *val)
+{
+    int rc;
+    maple_i2c_ioctl_param params =
+    {
+        .addr = addr,
+    };
+
+    rc = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_FPGA_READ, &params);
+    BCMOS_TRACE_CHECK_RETURN(rc, BCM_ERR_INTERNAL, "ioctl failed for fpga_read\n");
+    *val = params.val;
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_fpga_reg_read(uint32_t reg, uint32_t *val)
+{
+    bcmos_errno rc;
+
+    if (reg > BCM_FPGA_REG_HIGH)
+        return BCM_ERR_RANGE;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    return bcm_board_fpga_read(reg, val);
+}
+
+bcmos_errno bcm_board_fpga_reg_write(uint32_t reg, uint32_t val)
+{
+    bcmos_errno rc;
+
+    if (reg > BCM_FPGA_REG_HIGH)
+        return BCM_ERR_RANGE;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    return bcm_board_fpga_write(reg, val);
+}
+
+bcmos_errno bcm_board_fpga_version_get(uint32_t *version)
+{
+    bcmos_errno rc;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    return bcm_board_fpga_read(BCM_FPGA_REG_FPGA_VERSION, version);
+}
+
+bcmos_errno bcm_board_fpga_set_gpio_dir(bcmolt_gpio_pin gpio_pin, bcm_fpga_gpio_dir dir)
+{
+    bcmos_errno rc;
+    uint32_t gpio_dir_mask;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    /* Read-modify-write direction register (we don't want to affect other GPIO's). */
+    rc = bcm_board_fpga_read(BCM_FPGA_REG_GPIO_DIR, &gpio_dir_mask);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+    if (dir == BCM_FPGA_GPIO_DIR_INPUT)
+        gpio_dir_mask &= ~(1 << (gpio_pin - BCMOLT_GPIO_PIN_PIN4));
+    else
+        gpio_dir_mask |= (1 << (gpio_pin - BCMOLT_GPIO_PIN_PIN4));
+
+    return bcm_board_fpga_write(BCM_FPGA_REG_GPIO_DIR, gpio_dir_mask);
+}
+
+bcmos_errno bcm_board_fpga_get_gpio_dir(bcmolt_gpio_pin gpio_pin, bcm_fpga_gpio_dir *dir)
+{
+    bcmos_errno rc;
+    uint32_t gpio_dir_mask;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    rc = bcm_board_fpga_read(BCM_FPGA_REG_GPIO_DIR, &gpio_dir_mask);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    *dir = (gpio_dir_mask & (1 << (gpio_pin - BCMOLT_GPIO_PIN_PIN4))) ? BCM_FPGA_GPIO_DIR_OUTPUT : BCM_FPGA_GPIO_DIR_INPUT;
+
+    return rc;
+}
+
+bcmos_errno bcm_board_fpga_write_gpio(bcmolt_gpio_pin gpio_pin, uint32_t val)
+{
+    bcmos_errno rc;
+    uint32_t gpio_write_mask;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    /* Read-modify-write direction register (we don't want to affect other GPIO's). */
+    rc = bcm_board_fpga_read(BCM_FPGA_REG_GPIO_OUTPUT, &gpio_write_mask);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+    if (!val)
+        gpio_write_mask &= ~(1 << (gpio_pin - BCMOLT_GPIO_PIN_PIN4));
+    else
+        gpio_write_mask |= (1 << (gpio_pin - BCMOLT_GPIO_PIN_PIN4));
+
+    return bcm_board_fpga_write(BCM_FPGA_REG_GPIO_OUTPUT, gpio_write_mask);
+}
+
+bcmos_errno bcm_board_fpga_read_gpio(bcmolt_gpio_pin gpio_pin, uint32_t *val)
+{
+    bcmos_errno rc;
+    uint32_t gpio_read_mask;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    rc = bcm_board_fpga_read(BCM_FPGA_REG_GPIO_INPUT, &gpio_read_mask);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    *val = (gpio_read_mask & (1 << (gpio_pin - BCMOLT_GPIO_PIN_PIN4)));
+
+    return rc;
+}
+
+bcmos_errno bcm_board_fpga_gen_gpio_irq(bcmolt_ext_irq ext_irq)
+{
+    bcmos_errno rc;
+    uint32_t gpio_irq_mask;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    /* Read-modify-write direction register (we don't want to affect other GPIO's). */
+    rc = bcm_board_fpga_read(BCM_FPGA_REG_GPIO_IRQ, &gpio_irq_mask);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    gpio_irq_mask |= (1 << ext_irq);
+    rc = bcm_board_fpga_write(BCM_FPGA_REG_GPIO_IRQ, gpio_irq_mask);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    bcmos_usleep(1000);
+
+    gpio_irq_mask &= ~(1 << ext_irq);
+    rc = bcm_board_fpga_write(BCM_FPGA_REG_GPIO_IRQ, gpio_irq_mask);
+
+    return rc;
+}
+
+bcmos_errno bcm_board_trx_present(uint8_t pon)
+{
+    bcmos_errno rc;
+    uint32_t trx_absence_mask;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    /* Check that the transceiver is present (plugged in). For ONU simulator, we allow working without transceivers. */
+    rc = bcm_board_fpga_read(BCM_FPGA_REG_TRX_IS_PRESENT, &trx_absence_mask);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    if (trx_absence_mask & (1 << pon))
+    {
+        /* The transceiver is absent. */
+        return BCM_ERR_NODEV;
+    }
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_trx_enable(uint8_t pon, bcmos_bool is_enabled)
+{
+#ifdef CONFIG_ONU_SIM
+    static uint32_t trx_disable_mask = 0xFFFFFFFF;
+
+    /* Keep track of which TRXs are logically enabled. */
+    if (is_enabled)
+        trx_disable_mask &= ~(1 << pon);
+    else
+        trx_disable_mask |= (1 << pon);
+
+    return bcm_board_host_event_write(trx_disable_mask);
+#else
+    uint32_t trx_disable_mask;
+    uint32_t trx_absence_mask;
+
+    bcmos_errno rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    /* Check that the transceiver is present (plugged in). */
+    rc = bcm_board_fpga_read(BCM_FPGA_REG_TRX_IS_PRESENT, &trx_absence_mask);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+    if (trx_absence_mask & (1 << pon))
+    {
+        /* The transceiver is absent. */
+        return BCM_ERR_NODEV;
+    }
+
+    /* Read-modify-write transceiver disable mask (we don't want to affect other PON's). */
+    rc = bcm_board_fpga_read(BCM_FPGA_REG_TRX_ENABLE, &trx_disable_mask);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+    if (is_enabled == BCMOS_TRUE)
+        trx_disable_mask &= ~(1 << pon);
+    else
+        trx_disable_mask |= (1 << pon);
+
+    rc = bcm_board_fpga_write(BCM_FPGA_REG_TRX_ENABLE, trx_disable_mask);
+    if (rc != BCM_ERR_OK)
+        return BCM_ERR_INTERNAL;
+    return bcm_board_host_event_write(trx_disable_mask);
+#endif
+}
+
+static bcmos_errno bcm_board_config_reset_value(uint32_t rst_bit, bcmos_bool is_on)
+{
+    bcmos_errno rc;
+    uint32_t reset_values;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    /* Read-modify-write so we can set only the relevant bit to 0 */
+    rc = bcm_board_fpga_read(BCM_FPGA_REG_RESETS, &reset_values);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    if (is_on == BCMOS_TRUE)
+        reset_values |= 1 << rst_bit;
+    else
+        reset_values &= ~(1 << rst_bit);
+
+    return bcm_board_fpga_write(BCM_FPGA_REG_RESETS, reset_values);
+}
+
+static bcmos_errno device_disconnect(void)
+{
+    bcmolt_device_key key = {};
+    bcmolt_device_cfg dev_cfg;
+    bcmolt_device_disconnect dev_disconnect;
+    bcmos_errno rc;
+
+    BCMOLT_CFG_INIT(&dev_cfg, device, key);
+    BCMOLT_CFG_PROP_GET(&dev_cfg, device, state);
+    rc = bcmolt_cfg_get(0, &dev_cfg.hdr);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+    if (dev_cfg.data.state != BCMOLT_DEVICE_STATE_DISCONNECTED)
+    {
+        BCMOLT_OPER_INIT(&dev_disconnect, device, disconnect, key);
+        return bcmolt_oper_submit(0, &dev_disconnect.hdr);
+    }
+    else
+        return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_device_reset(void)
+{
+    bcmos_errno rc;
+
+    rc = device_disconnect();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+    rc = bcm_board_config_reset_value(BCM_RST_BIT_DEVICE, BCMOS_FALSE);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    return bcm_board_config_reset_value(BCM_RST_BIT_DEVICE, BCMOS_TRUE);
+}
+
+/* Device on keeps the reset bit on active high */
+bcmos_errno bcm_board_device_on(void)
+{
+    return bcm_board_config_reset_value(BCM_RST_BIT_DEVICE, BCMOS_TRUE);
+}
+
+/* Device off keeps the reset bit on active low */
+bcmos_errno bcm_board_device_off(void)
+{
+    bcmos_errno rc;
+
+    rc = device_disconnect();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    return bcm_board_config_reset_value(BCM_RST_BIT_DEVICE, BCMOS_FALSE);
+}
+
+/* Katana2 Device on keeps the reset bit on active high */
+bcmos_errno bcm_board_kt2_device_on(void)
+{
+    /* take the KT2 out of reset */
+    return bcm_board_config_reset_value(BCM_RST_BIT_KT2, BCMOS_TRUE);
+}
+
+/* Device off keeps the reset bit on active low */
+bcmos_errno bcm_board_kt2_device_off(void)
+{
+    return bcm_board_config_reset_value(BCM_RST_BIT_KT2, BCMOS_FALSE);
+}
+
+static bcmos_errno bcm_access_dpll(void)
+{
+    bcmos_errno rc;
+
+    if (bcm_board_is_svk4())
+    {
+        rc = bcm_board_dev_change(I2C_SW1_I2C_ADDR);
+        BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_dev_change(I2C_SW1_I2C_ADDR) failed\n");
+        rc = bcm_board_switch_write(0x20);
+        BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_switch_write(0x20) failed\n");
+    }
+    else
+    {
+        rc = bcm_board_dev_change(I2C_SW0_I2C_ADDR);
+        BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_dev_change(I2C_SW0_I2C_ADDR) failed\n");
+        rc = bcm_board_switch_write(2);
+        BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_switch_write(2) failed\n");
+    }
+
+    rc = bcm_board_dev_change(PON_DPLL_I2C_ADDR);
+    BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_dev_change(PON_DPLL_I2C_ADDR) failed \n");
+
+    return rc;
+}
+
+static int bcm_board_set_page_dpll(uint32_t page)
+{
+    int rcioctl;
+    maple_i2c_ioctl_param params =
+    {
+        .count = 8,
+        .addr = 1,
+        .val = page,
+    };
+
+    rcioctl = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_DEV_WRITE, &params);
+    BCMOS_TRACE_CHECK_RETURN(rcioctl, BCM_ERR_INTERNAL, "ioctl write change page failed\n");
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_read_dpll(uint32_t page, uint32_t reg, uint32_t *val)
+{
+    bcmos_errno rc;
+    int rcioctl;
+    maple_i2c_ioctl_param params =
+    {
+        .count = 8,
+        .addr = reg,
+        .val = 0,
+    };
+
+    rc = bcm_access_dpll();
+    bcm_board_set_page_dpll(page);
+    rcioctl = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_DEV_READ, &params);
+    BCMOS_TRACE_CHECK_RETURN(rcioctl, BCM_ERR_INTERNAL, "ioctl read failed for maple_i2c_fd\n");
+    *val = params.val;
+
+    return rc;
+}
+
+bcmos_errno bcm_board_write_dpll(uint32_t page, uint32_t reg, uint32_t val)
+{
+    bcmos_errno rc;
+    int rcioctl;
+    maple_i2c_ioctl_param params =
+    {
+        .count = 8,
+        .addr = reg,
+        .val = val,
+    };
+
+    rc = bcm_access_dpll();
+    bcm_board_set_page_dpll(page);
+    rcioctl = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_DEV_WRITE, &params);
+    BCMOS_TRACE_CHECK_RETURN(rcioctl, BCM_ERR_INTERNAL, "ioctl write failed for maple_i2c_fd\n");
+
+    return rc;
+}
+
+static bcmos_errno bcm_board_load_dpll(dpll_command *commands, int cmdlen)
+{
+    int rcioctl,i;
+    bcmos_errno rc;
+    uint8_t previous_page = 0;
+
+    maple_i2c_ioctl_param params =
+    {
+        .count = 8,
+        .addr = 0,
+        .val = 0,
+    };
+
+    rc = bcm_access_dpll();
+    for (i=0; i < cmdlen; i++)
+    {
+        if (commands[i].page != previous_page)
+        {
+            bcm_board_set_page_dpll(commands[i].page);
+            previous_page = commands[i].page;
+        }
+        params.addr = commands[i].reg;
+        params.val = commands[i].data;
+        rcioctl = ioctl(maple_i2c_fd, MAPLE_I2C_IOCTL_OP_DEV_WRITE, &params);
+        BCMOS_TRACE_CHECK_RETURN(rcioctl, BCM_ERR_INTERNAL, "ioctl write data page failed\n");
+    }
+    return rc;
+}
+bcmos_errno bcm_board_burn_pon_dpll(bcm_dpll_users dpll_dev)
+{
+    switch(dpll_dev)
+    {
+        case GPON_DPLL:
+            return bcm_board_load_dpll(gpon_dpll_table,sizeof(gpon_dpll_table)/sizeof(dpll_command));
+            break;
+        case EPON_DPLL:
+            return bcm_board_load_dpll(epon_dpll_table,sizeof(epon_dpll_table)/sizeof(dpll_command));
+            break;
+        case GPON_SYNCE:
+            return bcm_board_load_dpll(gpon_synce_dpll_table,sizeof(gpon_synce_dpll_table)/sizeof(dpll_command));
+            break;
+        default:
+            break;
+    }
+
+    return BCM_ERR_PARM;
+}
+
+bcmos_errno bcm_board_init(void)
+{
+    maple_dev_ctrl_fd = open("/dev/maple_dev_ctrl", O_RDWR);
+    BCMOS_TRACE_CHECK_RETURN(maple_dev_ctrl_fd < 0, errno, "maple_dev_ctrl_fd open failed\n");
+
+    maple_i2c_fd = open("/dev/maple_i2c", O_RDWR);
+    BCMOS_TRACE_CHECK_RETURN(maple_i2c_fd < 0, errno, "maple_i2c_fd open failed\n");
+
+#ifdef CONFIG_ONU_SIM
+    /* If the ONU sim is running, always leave all transceivers physically disabled. */
+    bcmos_errno rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+    rc = bcm_board_fpga_write(BCM_FPGA_REG_TRX_ENABLE, 0xFFFFFFFF);
+    if (rc != BCM_ERR_OK)
+        return BCM_ERR_INTERNAL;
+#endif
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_get_board_id(bcm_board_svk_board_id * board_id)
+{
+    bcmos_errno rc;
+    uint32_t val;
+
+    rc = bcm_access_fpga();
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    rc = bcm_board_fpga_read(0x1, &val);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+
+    *board_id = val & 0x7;
+    return BCM_ERR_OK;
+}
+
+void bcm_board_uninit(void)
+{
+    close(maple_i2c_fd);
+    maple_i2c_fd = 0;
+
+    close(maple_dev_ctrl_fd);
+    maple_dev_ctrl_fd = -1;
+}
+
diff --git a/bcm68620_release/release/host_customized/board/wrx/bcmolt_board.h b/bcm68620_release/release/host_customized/board/wrx/bcmolt_board.h
new file mode 100644
index 0000000..3a58eba
--- /dev/null
+++ b/bcm68620_release/release/host_customized/board/wrx/bcmolt_board.h
@@ -0,0 +1,100 @@
+/*
+<:copyright-BRCM:2016:DUAL/GPL:standard
+
+   Broadcom Proprietary and Confidential.(c) 2016 Broadcom
+   All Rights Reserved
+
+Unless you and Broadcom execute a separate written software license
+agreement governing use of this software, this software is licensed
+to you under the terms of the GNU General Public License version 2
+(the "GPL"), available at http://www.broadcom.com/licenses/GPLv2.php,
+with the following added to such license:
+
+   As a special exception, the copyright holders of this software give
+   you permission to link this software with independent modules, and
+   to copy and distribute the resulting executable under terms of your
+   choice, provided that you also meet, for each linked independent
+   module, the terms and conditions of the license of that module.
+   An independent module is a module which is not derived from this
+   software.  The special exception does not apply to any modifications
+   of the software.
+
+Not withstanding the above, under no circumstances may you combine
+this software in any way with any other Broadcom software provided
+under a license other than the GPL, without Broadcom's express prior
+written consent.
+
+:>
+ */
+#ifndef _BCMOLT_BOARD_H_
+#define _BCMOLT_BOARD_H_
+
+#include <bcmos_system.h>
+#include <bcmolt_model_types.h>
+
+typedef enum
+{
+    SVK_1    = 0x7, /* SVK #1 - BCM968620S: all PON flavors supported, SFP+ */
+    SVK_2_XG = 0x6, /* SVK #2 - BCM968620XG: XGPON */
+    SVK_2_XE = 0x5, /* SVK #2 - BCM968620XE: 10G EPON */
+    SVK_3    = 0x4, /* SVK #3 - BCM968620K: all PON flavors supported, XFP */
+} bcm_board_svk_board_id;
+
+bcmos_errno bcm_board_dev_change(uint32_t addr);
+bcmos_errno bcm_board_dev_write(uint32_t count, uint32_t addr, uint32_t val);
+bcmos_errno bcm_board_dev_read(uint32_t count, uint32_t addr, uint32_t *val);
+bcmos_errno bcm_board_switch_write(uint32_t val);
+bcmos_errno bcm_board_switch_read(uint32_t *val);
+bcmos_errno bcm_board_fpga_write(uint32_t addr, uint32_t val);
+bcmos_errno bcm_board_fpga_read(uint32_t addr, uint32_t *val);
+bcmos_errno bcm_board_host_event_write(uint32_t val);
+
+bcmos_errno bcm_board_fpga_version_get(uint32_t *version);
+
+/* FPGA GPIO access */
+typedef enum
+{
+    BCM_FPGA_GPIO_DIR_INPUT,
+    BCM_FPGA_GPIO_DIR_OUTPUT,
+} bcm_fpga_gpio_dir;
+
+typedef enum
+{
+    GPON_DPLL,
+    EPON_DPLL,
+    GPON_SYNCE
+} bcm_dpll_users;
+
+typedef struct
+{
+    uint8_t  page;
+    uint8_t  reg;
+    uint8_t  data;
+} dpll_command;
+
+bcmos_errno bcm_board_fpga_set_gpio_dir(bcmolt_gpio_pin gpio_pin, bcm_fpga_gpio_dir dir);
+bcmos_errno bcm_board_fpga_get_gpio_dir(bcmolt_gpio_pin gpio_pin, bcm_fpga_gpio_dir *dir);
+bcmos_errno bcm_board_fpga_write_gpio(bcmolt_gpio_pin gpio_pin, uint32_t val);
+bcmos_errno bcm_board_fpga_read_gpio(bcmolt_gpio_pin gpio_pin, uint32_t *val);
+bcmos_errno bcm_board_fpga_gen_gpio_irq(bcmolt_ext_irq ext_irq);
+
+bcmos_errno bcm_board_trx_enable(uint8_t pon, bcmos_bool is_enabled);
+bcmos_errno bcm_board_trx_present(uint8_t pon);
+bcmos_errno bcm_board_device_reset(void);
+bcmos_errno bcm_board_device_on(void);
+bcmos_errno bcm_board_device_off(void);
+bcmos_errno bcm_board_kt2_device_on(void);
+bcmos_errno bcm_board_kt2_device_off(void);
+bcmos_errno bcm_board_get_board_id(bcm_board_svk_board_id * board_id);
+bcmos_errno bcm_board_fpga_reg_read(uint32_t reg, uint32_t *val);
+bcmos_errno bcm_board_fpga_reg_write(uint32_t reg, uint32_t val);
+bcmos_errno bcm_board_pci_debug(uint32_t device, uint32_t command, int32_t start, int32_t howmany, uint32_t *dumpptr);
+bcmos_errno bcm_board_burn_pon_dpll(bcm_dpll_users dpll_dev);
+bcmos_errno bcm_board_write_dpll(uint32_t page, uint32_t reg, uint32_t val);
+bcmos_errno bcm_board_read_dpll(uint32_t page, uint32_t reg, uint32_t *val);
+
+bcmos_errno bcm_board_init(void);
+void bcm_board_uninit(void);
+
+#endif
+
diff --git a/bcm68620_release/release/host_customized/board/wrx/bcmolt_board_cli.c b/bcm68620_release/release/host_customized/board/wrx/bcmolt_board_cli.c
new file mode 100644
index 0000000..e7b59fa
--- /dev/null
+++ b/bcm68620_release/release/host_customized/board/wrx/bcmolt_board_cli.c
@@ -0,0 +1,581 @@
+/*
+<:copyright-BRCM:2016:DUAL/GPL:standard
+
+   Broadcom Proprietary and Confidential.(c) 2016 Broadcom
+   All Rights Reserved
+
+Unless you and Broadcom execute a separate written software license
+agreement governing use of this software, this software is licensed
+to you under the terms of the GNU General Public License version 2
+(the "GPL"), available at http://www.broadcom.com/licenses/GPLv2.php,
+with the following added to such license:
+
+   As a special exception, the copyright holders of this software give
+   you permission to link this software with independent modules, and
+   to copy and distribute the resulting executable under terms of your
+   choice, provided that you also meet, for each linked independent
+   module, the terms and conditions of the license of that module.
+   An independent module is a module which is not derived from this
+   software.  The special exception does not apply to any modifications
+   of the software.
+
+Not withstanding the above, under no circumstances may you combine
+this software in any way with any other Broadcom software provided
+under a license other than the GPL, without Broadcom's express prior
+written consent.
+
+:>
+ */
+
+#include <bcmcli.h>
+#include "bcmolt_board.h"
+#include "bcmolt_board_cli.h"
+#include <arpa/inet.h>
+
+#define BCM_I2C_DEV_ADDR_START static bcmcli_enum_val bcm_i2c_dev_addr_table[] = {
+#define BCM_I2C_DEV_ADDR(name, desc, val) {desc, val},
+#define BCM_I2C_DEV_ADDR_END BCMCLI_ENUM_LAST};
+#include <bcmolt_i2c_devs_addr.h>
+
+static bcmos_errno bcm_board_cli_dev_change(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint32_t addr = bcmcli_find_named_parm(session, "dev")->value.unumber;
+
+    return bcm_board_dev_change(addr);
+}
+
+static bcmos_errno bcm_board_cli_dev_write(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint32_t count = bcmcli_find_named_parm(session, "width")->value.unumber;
+    uint32_t addr = bcmcli_find_named_parm(session, "addr")->value.unumber;
+    uint32_t val = bcmcli_find_named_parm(session, "val")->value.unumber;
+
+    switch (count)
+    {
+    case 8:
+    case 16:
+    case 32:
+        break;
+    default:
+        bcmcli_session_print(session, "Count can be 8|16|32\n");
+        return BCM_ERR_PARM;
+    }
+    return bcm_board_dev_write(count, addr, val);
+}
+
+static bcmos_errno bcm_board_cli_dev_read(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint32_t count = bcmcli_find_named_parm(session, "width")->value.unumber;
+    uint32_t addr = bcmcli_find_named_parm(session, "addr")->value.unumber;
+    uint32_t val;
+    bcmos_errno rc;
+    
+    switch (count)
+    {
+    case 8:
+    case 16:
+    case 32:
+        break;
+    default:
+        bcmcli_session_print(session, "Count can be 8|16|32\n");
+        return BCM_ERR_PARM;
+    }
+    rc = bcm_board_dev_read(count, addr, &val);
+    BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_dev_read() failed\n");
+    bcmcli_session_print(session, "0x%x\n", val);
+    
+    return BCM_ERR_OK;
+}
+
+static bcmos_errno bcm_board_cli_switch_write(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint32_t val = bcmcli_find_named_parm(session, "val")->value.unumber;
+
+    return bcm_board_switch_write(val);
+}
+
+static bcmos_errno bcm_board_cli_switch_read(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint32_t val;
+    bcmos_errno rc;
+
+    rc = bcm_board_switch_read(&val);
+    BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_switch_read() failed\n");
+    bcmcli_session_print(session, "0x%x\n", val);
+    
+    return BCM_ERR_OK;
+}
+
+static bcmos_errno bcm_board_cli_fpga_write(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint32_t addr = bcmcli_find_named_parm(session, "addr")->value.unumber;
+    uint32_t val = bcmcli_find_named_parm(session, "val")->value.unumber;
+    
+    return bcm_board_fpga_write(addr, val);
+}
+
+static bcmos_errno bcm_board_cli_fpga_read(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint32_t addr = bcmcli_find_named_parm(session, "addr")->value.unumber;
+    uint32_t val;
+    bcmos_errno rc;
+    
+    rc = bcm_board_fpga_read(addr, &val);
+    BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_fpga_read() failed\n");
+    bcmcli_session_print(session, "0x%x\n", val);
+
+    return BCM_ERR_OK;
+}
+
+static bcmos_errno bcm_board_cli_fpga_version(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint32_t version;
+    bcmos_errno rc;
+
+    rc = bcm_board_fpga_version_get(&version);
+    bcmcli_session_print(session, "0x%x\n", version);
+    return rc;
+}
+
+static bcmos_errno bcm_board_cli_fpga_set_gpio_dir(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    bcmolt_gpio_pin gpio_pin = bcmcli_find_named_parm(session, "gpio_pin")->value.unumber;
+    bcm_fpga_gpio_dir dir = bcmcli_find_named_parm(session, "dir")->value.unumber;
+
+    return bcm_board_fpga_set_gpio_dir(gpio_pin, dir);
+}
+
+static bcmos_errno bcm_board_cli_fpga_get_gpio_dir(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    bcmolt_gpio_pin gpio_pin = bcmcli_find_named_parm(session, "gpio_pin")->value.unumber;
+    bcm_fpga_gpio_dir dir;
+    bcmos_errno rc;
+  
+    rc = bcm_board_fpga_get_gpio_dir(gpio_pin, &dir);
+    bcmcli_session_print(session, "%s\n", dir == BCM_FPGA_GPIO_DIR_INPUT ? "input" : "output");
+    return rc;
+}
+
+static bcmos_errno bcm_board_cli_fpga_write_gpio(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    bcmolt_gpio_pin gpio_pin = bcmcli_find_named_parm(session, "gpio_pin")->value.unumber;
+    uint32_t val = bcmcli_find_named_parm(session, "val")->value.unumber;
+
+    return bcm_board_fpga_write_gpio(gpio_pin, val);
+}
+
+static bcmos_errno bcm_board_cli_fpga_read_gpio(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    bcmolt_gpio_pin gpio_pin = bcmcli_find_named_parm(session, "gpio_pin")->value.unumber;
+    uint32_t val;
+    bcmos_errno rc;
+  
+    rc = bcm_board_fpga_read_gpio(gpio_pin, &val);
+    bcmcli_session_print(session, "0x%x\n", val);
+    return rc;
+}
+
+static bcmos_errno bcm_board_cli_fpga_gen_gpio_irq(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    bcmolt_ext_irq ext_irq = bcmcli_find_named_parm(session, "irq")->value.unumber;
+  
+    return bcm_board_fpga_gen_gpio_irq(ext_irq);
+}
+
+static bcmos_errno bcm_board_cli_trx_enable(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint8_t pon_id = bcmcli_find_named_parm(session, "pon_id")->value.unumber;
+
+    return bcm_board_trx_enable(pon_id, BCMOS_TRUE);
+}
+
+static bcmos_errno bcm_board_cli_trx_disable(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint8_t pon_id = bcmcli_find_named_parm(session, "pon_id")->value.unumber;
+
+    return bcm_board_trx_enable(pon_id, BCMOS_FALSE);
+}
+
+static bcmos_errno bcm_board_cli_device_reset(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    return bcm_board_device_reset();
+}
+
+static bcmos_errno bcm_board_cli_device_on(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    return bcm_board_device_on();
+}
+
+static bcmos_errno bcm_board_cli_device_off(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    return bcm_board_device_off();
+}
+
+static bcmos_errno bcm_board_cli_kt2_on(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    return bcm_board_kt2_device_on();
+}
+
+static bcmos_errno bcm_board_cli_kt2_off(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    return bcm_board_kt2_device_off();
+}
+
+static bcmos_errno bcm_board_cli_fpga_reg_read(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+	uint32_t addr = bcmcli_find_named_parm(session, "addr")->value.unumber;
+	uint32_t val;
+	bcmos_errno rc;
+
+	rc = bcm_board_fpga_reg_read(addr, &val);
+	BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_fpga_reg_read() failed\n");
+	bcmcli_session_print(session, "0x%x\n", val);
+
+	return BCM_ERR_OK;
+}
+
+static bcmos_errno bcm_board_cli_fpga_reg_write(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+	uint32_t addr = bcmcli_find_named_parm(session, "addr")->value.unumber;
+	uint32_t val = bcmcli_find_named_parm(session, "val")->value.unumber;
+
+    return bcm_board_fpga_reg_write(addr, val);
+}
+
+static bcmos_errno bcm_board_cli_burn_dpll(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+	bcmos_errno rc;
+
+    uint32_t dev = bcmcli_find_named_parm(session, "device")->value.unumber;
+    rc = bcm_board_burn_pon_dpll(dev);
+	BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_burn_pon_dpll() failed\n");
+
+    return BCM_ERR_OK;
+}
+
+static bcmos_errno bcm_board_cli_dpll_write(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint32_t page = bcmcli_find_named_parm(session, "page")->value.unumber;
+    uint32_t addr = bcmcli_find_named_parm(session, "addr")->value.unumber;
+    uint32_t val = bcmcli_find_named_parm(session, "val")->value.unumber;
+    
+    return bcm_board_write_dpll(page, addr, val);
+}
+
+static bcmos_errno bcm_board_cli_dpll_read(bcmcli_session *session, const bcmcli_cmd_parm parm[], uint16_t n_parms)
+{
+    uint32_t page = bcmcli_find_named_parm(session, "page")->value.unumber;
+    uint32_t addr = bcmcli_find_named_parm(session, "addr")->value.unumber;
+    uint32_t val;
+    bcmos_errno rc;
+    
+    rc = bcm_board_read_dpll(page, addr, &val);
+    BCMOS_TRACE_CHECK_RETURN(rc, rc, "bcm_board_dpll_read() failed\n");
+    bcmcli_session_print(session, "0x%x\n", val);
+
+    return BCM_ERR_OK;
+}
+
+/* LUK_MAX_DATA_SIZE (2*1024) */
+#define SWITCH_RECEIVE_BUFFER_LENGTH   (2*1024)
+static int switch_socket = -1;
+static char *switch_buffer = NULL;
+static bcmos_bool switch_first_connection = BCMOS_TRUE;
+
+static void switch_response(bcmcli_session *session)
+{
+    int len;
+    char *prompt = NULL;
+
+    while (1)
+    {
+        len = read(switch_socket, switch_buffer, SWITCH_RECEIVE_BUFFER_LENGTH-1);
+        if (len > 0)
+        {
+            switch_buffer[len] = '\0';
+            bcmcli_print(session, "%s", switch_buffer);
+            prompt = strstr(switch_buffer, "BCM");
+            while (prompt)
+            {
+                len = strlen(prompt);
+                if (len >= 6)
+                {
+                    if ((prompt[3] == '>') || ((prompt[3] == '.') && (prompt[5] == '>')))
+                        return;
+                }
+                else if (len >= 4)
+                {
+                    if (prompt[3] == '>')
+                        return;
+                }
+                prompt = strstr(&prompt[2], "BCM");
+            }
+        }
+        else
+            break;
+    }
+}
+
+static bcmos_errno kt2_conn(bcmcli_session *session, const bcmcli_cmd_parm parm[],  uint16_t n_parms)
+{
+    struct sockaddr_in server;
+
+    if (switch_socket != -1)
+    {
+        bcmcli_print(session, "A connection already exists\n");
+        return BCM_ERR_ALREADY;
+    }
+
+    switch_buffer = bcmos_alloc(SWITCH_RECEIVE_BUFFER_LENGTH);
+    if (!switch_buffer)
+    {
+        bcmcli_print(session, "Failed to allocate buffer\n");
+        return BCM_ERR_NOMEM;
+    }
+    memset((void *)&server, 0, sizeof(server));
+    server.sin_family = AF_INET;
+    server.sin_port = htons(parm[0].value.number);
+    server.sin_addr.s_addr = inet_addr("127.0.0.1");
+    switch_socket = socket(AF_INET, SOCK_STREAM, 0);
+    if (switch_socket < 0)
+    {
+        bcmcli_print(session, "Can't open client socket\n");
+        goto exit;
+    }
+    if (connect(switch_socket, (struct sockaddr *)&server, sizeof(server)) == -1)
+    {
+        close(switch_socket);
+        bcmcli_print(session, "Failed to connect\n");
+        goto exit;
+    }
+    if (switch_first_connection)
+    {
+        switch_first_connection = BCMOS_FALSE;
+        switch_response(session);
+    }
+
+    return BCM_ERR_OK;
+
+exit:
+    bcmos_free(switch_buffer);
+    return BCM_ERR_COMM_FAIL;
+}
+
+static bcmos_errno kt2_disconn(bcmcli_session *session, const bcmcli_cmd_parm parm[],  uint16_t n_parms)
+{
+    if (switch_socket != -1)
+    {
+        bcmcli_print(session, "Send 'exit'\n");
+        if (write(switch_socket, "exit\r", strlen("exit\r")) < 0)
+            bcmcli_print(session, "Send 'exit' to switch failed\n");
+        fsync(switch_socket);
+    }
+    bcmos_usleep(1000);
+    if (switch_socket != -1)
+        close(switch_socket);
+    if (switch_buffer)
+        bcmos_free(switch_buffer);
+    /* set socket and buffer with initial values */
+    switch_socket = -1;
+    switch_buffer = NULL;
+
+    return BCM_ERR_OK;
+}
+
+static bcmos_errno kt2_cmd(bcmcli_session *session, const bcmcli_cmd_parm parm[],  uint16_t n_parms)
+{
+    int len, sent_len;
+    char *str;
+
+    if ((switch_socket == -1) || (!switch_buffer))
+    {
+        bcmcli_print(session, "Connection or buffer do not exist\n");
+        return BCM_ERR_NORES;
+    }
+    /* switch user space application receives thru _fd_input_cb and
+       send to kernel thru _kernel_proxy_output_cb */
+    len = (int)strlen(parm[0].value.string);
+    {
+        /* dirty - just to avoid error : cast discards '__attribute__((const))' qualifier if useing strcat */
+        unsigned long strp = (unsigned long)&parm[0].value.string;
+        str = *(char **)strp;
+    }
+    str[len++] = '\r';
+    str[len] = '\0';
+    sent_len = 0;
+    do
+    {
+        sent_len = write(switch_socket, str + sent_len , len - sent_len);
+        if (sent_len == -1 || ((sent_len == 0) && errno))
+        {
+            bcmcli_print(session, "Send command to switch failed (write to socket error: %d)\n", errno);
+            return BCM_ERR_COMM_FAIL;
+        }
+        fsync(switch_socket);
+    } while(len - sent_len);
+    /* switch kernel send thru _kernel_proxy_input_cb
+       to switch user space application thru _fd_outout_cb */
+    switch_response(session);
+
+    return BCM_ERR_OK;
+}
+
+bcmos_errno bcm_board_cli_init(bcmcli_entry *top_dir)
+{
+    bcmcli_entry *board_dir, *i2c_dir;
+    bcmos_errno rc;
+    bcm_board_svk_board_id board_id;
+    bcmcli_entry *dir;
+    static bcmcli_enum_val fpga_gpio_pin_table[] =
+    {
+        {"pin4", BCMOLT_GPIO_PIN_PIN4},
+        {"pin5", BCMOLT_GPIO_PIN_PIN5},
+        {"pin6", BCMOLT_GPIO_PIN_PIN6},
+        {"pin7", BCMOLT_GPIO_PIN_PIN7},
+        {"pin8", BCMOLT_GPIO_PIN_PIN8},
+        {"pin9", BCMOLT_GPIO_PIN_PIN9},
+        {"pin10", BCMOLT_GPIO_PIN_PIN10},
+        {"pin11", BCMOLT_GPIO_PIN_PIN11},
+        {"pin12", BCMOLT_GPIO_PIN_PIN12},
+        {"pin13", BCMOLT_GPIO_PIN_PIN13},
+        {"pin14", BCMOLT_GPIO_PIN_PIN14},
+        {"pin15", BCMOLT_GPIO_PIN_PIN15},
+        {"pin16", BCMOLT_GPIO_PIN_PIN16},
+        {"pin17", BCMOLT_GPIO_PIN_PIN17},
+        {"pin18", BCMOLT_GPIO_PIN_PIN18},
+        {"pin19", BCMOLT_GPIO_PIN_PIN19},
+        {"pin20", BCMOLT_GPIO_PIN_PIN20},
+        {"pin21", BCMOLT_GPIO_PIN_PIN21},
+        {"pin22", BCMOLT_GPIO_PIN_PIN22},
+        {"pin23", BCMOLT_GPIO_PIN_PIN23},
+        {"pin24", BCMOLT_GPIO_PIN_PIN24},
+        {"pin25", BCMOLT_GPIO_PIN_PIN25},
+        {"pin26", BCMOLT_GPIO_PIN_PIN26},
+        {"pin27", BCMOLT_GPIO_PIN_PIN27},
+        {"pin28", BCMOLT_GPIO_PIN_PIN28},
+        {"pin29", BCMOLT_GPIO_PIN_PIN29},
+        {"pin30", BCMOLT_GPIO_PIN_PIN30},
+        {"pin31", BCMOLT_GPIO_PIN_PIN31},
+        BCMCLI_ENUM_LAST
+    };
+    static bcmcli_enum_val fpga_ext_irq_table[] =
+    {
+        {"ext_irq0", BCMOLT_EXT_IRQ_EXT_IRQ0},
+        {"ext_irq1", BCMOLT_EXT_IRQ_EXT_IRQ1},
+        {"ext_irq2", BCMOLT_EXT_IRQ_EXT_IRQ2},
+        {"ext_irq3", BCMOLT_EXT_IRQ_EXT_IRQ3},
+        {"ext_irq4", BCMOLT_EXT_IRQ_EXT_IRQ4},
+        {"ext_irq5", BCMOLT_EXT_IRQ_EXT_IRQ5},
+        BCMCLI_ENUM_LAST
+    };
+
+    static bcmcli_enum_val fpga_gpio_dir_table[] =
+    {
+        {"input", BCM_FPGA_GPIO_DIR_INPUT},
+        {"output", BCM_FPGA_GPIO_DIR_OUTPUT},
+        BCMCLI_ENUM_LAST
+    };
+
+    static bcmcli_enum_val dpll_devices[] = {
+        { .name="gpon", .val=GPON_DPLL},
+        { .name="epon", .val=EPON_DPLL},
+        { .name="synce", .val=GPON_SYNCE},
+        BCMCLI_ENUM_LAST
+    };
+    
+    board_dir = bcmcli_dir_add(top_dir, "board", "Board", BCMCLI_ACCESS_GUEST, NULL);
+    BCMOS_CHECK_RETURN_ERROR(!board_dir, BCM_ERR_INTERNAL);
+
+    i2c_dir = bcmcli_dir_add(board_dir, "i2c", "i2c", BCMCLI_ACCESS_GUEST, NULL);
+    BCMOS_CHECK_RETURN_ERROR(!i2c_dir, BCM_ERR_INTERNAL);
+
+    BCMCLI_MAKE_CMD(i2c_dir, "dev_change", "Change current device", bcm_board_cli_dev_change,
+        BCMCLI_MAKE_PARM_ENUM("dev", "device", bcm_i2c_dev_addr_table, 0));
+
+    BCMCLI_MAKE_CMD(i2c_dir, "dev_write", "Write to current i2c device", bcm_board_cli_dev_write,
+        BCMCLI_MAKE_PARM("width", "Width of register in bits (8|16|32)", BCMCLI_PARM_NUMBER, 0),
+        BCMCLI_MAKE_PARM("addr", "address", BCMCLI_PARM_HEX, 0),
+        BCMCLI_MAKE_PARM("val", "value", BCMCLI_PARM_HEX, 0));
+
+    BCMCLI_MAKE_CMD(i2c_dir, "dev_read", "Read from current i2c device", bcm_board_cli_dev_read,
+        BCMCLI_MAKE_PARM("width", "Width of register in bits (8|16|32)", BCMCLI_PARM_NUMBER, 0),
+        BCMCLI_MAKE_PARM("addr", "address", BCMCLI_PARM_HEX, 0));
+
+    BCMCLI_MAKE_CMD(i2c_dir, "switch_write", "Write to switch", bcm_board_cli_switch_write,
+        BCMCLI_MAKE_PARM_RANGE("val", "value", BCMCLI_PARM_HEX, 0, 0, UCHAR_MAX));
+
+    BCMCLI_MAKE_CMD_NOPARM(i2c_dir, "switch_read", "Read from switch", bcm_board_cli_switch_read);
+
+    BCMCLI_MAKE_CMD(i2c_dir, "fpga_write", "Write to FPGA", bcm_board_cli_fpga_write,
+        BCMCLI_MAKE_PARM("addr", "address", BCMCLI_PARM_HEX, 0),
+        BCMCLI_MAKE_PARM("val", "value", BCMCLI_PARM_HEX, 0));
+
+    BCMCLI_MAKE_CMD(i2c_dir, "fpga_read", "Read from FPGA", bcm_board_cli_fpga_read,
+        BCMCLI_MAKE_PARM("addr", "address", BCMCLI_PARM_HEX, 0));
+
+    BCMCLI_MAKE_CMD_NOPARM(board_dir, "fpga_version", "FPGA version", bcm_board_cli_fpga_version);
+    
+    BCMCLI_MAKE_CMD(board_dir, "fpga_set_gpio_dir", "Set GPIO direction", bcm_board_cli_fpga_set_gpio_dir,
+        BCMCLI_MAKE_PARM_ENUM("gpio_pin", "GPIO pin", fpga_gpio_pin_table, 0),
+        BCMCLI_MAKE_PARM_ENUM("dir", "Direction", fpga_gpio_dir_table, 0));
+    BCMCLI_MAKE_CMD(board_dir, "fpga_get_gpio_dir", "Get GPIO direction", bcm_board_cli_fpga_get_gpio_dir,
+        BCMCLI_MAKE_PARM_ENUM("gpio_pin", "GPIO pin", fpga_gpio_pin_table, 0));
+    BCMCLI_MAKE_CMD(board_dir, "fpga_write_gpio", "Write to GPIO pin", bcm_board_cli_fpga_write_gpio,
+        BCMCLI_MAKE_PARM_ENUM("gpio_pin", "GPIO pin", fpga_gpio_pin_table, 0),
+        BCMCLI_MAKE_PARM("val", "Value", BCMCLI_PARM_HEX, 0));
+    BCMCLI_MAKE_CMD(board_dir, "fpga_read_gpio", "Read from GPIO pin", bcm_board_cli_fpga_read_gpio,
+        BCMCLI_MAKE_PARM_ENUM("gpio_pin", "GPIO pin", fpga_gpio_pin_table, 0));
+    BCMCLI_MAKE_CMD(board_dir, "fpga_gen_irq", "Generate GPIO IRQ", bcm_board_cli_fpga_gen_gpio_irq,
+        BCMCLI_MAKE_PARM_ENUM("irq", "IRQ", fpga_ext_irq_table, 0));
+
+    BCMCLI_MAKE_CMD(board_dir, "trx_enable", "Enable transceiver", bcm_board_cli_trx_enable,
+        BCMCLI_MAKE_PARM("pon_id", "pon_id", BCMCLI_PARM_UDECIMAL, 0));
+
+    BCMCLI_MAKE_CMD(board_dir, "trx_disable", "Disable transceiver", bcm_board_cli_trx_disable,
+        BCMCLI_MAKE_PARM("pon_id", "pon_id", BCMCLI_PARM_UDECIMAL, 0));
+
+    BCMCLI_MAKE_CMD_NOPARM(board_dir, "device_reset", "Reset the device - clears the reset bit and then set it on", bcm_board_cli_device_reset);
+
+    BCMCLI_MAKE_CMD_NOPARM(board_dir, "device_on", "Keeps the device with reset bit on", bcm_board_cli_device_on);
+
+    BCMCLI_MAKE_CMD_NOPARM(board_dir, "device_off", "Keeps the device with reset bit off", bcm_board_cli_device_off);
+
+    BCMCLI_MAKE_CMD(board_dir, "fpga_reg_read", "Read data from an FPGA register", bcm_board_cli_fpga_reg_read,
+    	BCMCLI_MAKE_PARM("addr", "address", BCMCLI_PARM_HEX, 0));
+
+    BCMCLI_MAKE_CMD(board_dir, "fpga_reg_write", "Write data to an FPGA register", bcm_board_cli_fpga_reg_write,
+        BCMCLI_MAKE_PARM("addr", "address", BCMCLI_PARM_HEX, 0),
+        BCMCLI_MAKE_PARM("val", "value", BCMCLI_PARM_HEX, 0));
+
+    BCMCLI_MAKE_CMD(board_dir, "dpll", "Burn DPLL", bcm_board_cli_burn_dpll,
+        BCMCLI_MAKE_PARM_ENUM("device", "Device", dpll_devices, 0));
+    
+    BCMCLI_MAKE_CMD(board_dir, "dpll_write", "Write to DPLL", bcm_board_cli_dpll_write,
+        BCMCLI_MAKE_PARM("page", "page", BCMCLI_PARM_HEX, 0),
+        BCMCLI_MAKE_PARM("addr", "address", BCMCLI_PARM_HEX, 0),
+        BCMCLI_MAKE_PARM("val", "value", BCMCLI_PARM_HEX, 0));
+
+    BCMCLI_MAKE_CMD(board_dir, "dpll_read", "Read from DPLL", bcm_board_cli_dpll_read,
+        BCMCLI_MAKE_PARM("page", "page", BCMCLI_PARM_HEX, 0),
+        BCMCLI_MAKE_PARM("addr", "address", BCMCLI_PARM_HEX, 0));
+
+    rc = bcm_board_get_board_id(&board_id);
+    BCMOS_CHECK_RETURN(rc, rc, rc);
+    /* check if the board is SVK#3 */
+    if (board_id == SVK_3)
+    {
+        BCMCLI_MAKE_CMD_NOPARM(board_dir, "kt2_on", "Keeps the Katana2 with reset bit on", bcm_board_cli_kt2_on);
+
+        BCMCLI_MAKE_CMD_NOPARM(board_dir, "kt2_off", "Keeps the Katana2 with reset bit off", bcm_board_cli_kt2_off);
+
+        dir = bcmcli_dir_add(board_dir, "switch", "Switch", BCMCLI_ACCESS_ADMIN, NULL);
+        BCMOS_CHECK_RETURN_ERROR(!dir, BCM_ERR_NOMEM);
+        BCMCLI_MAKE_CMD(dir, "conn", "connect to switch daemon", kt2_conn,
+            BCMCLI_MAKE_PARM("port", "connection port on localhost", BCMCLI_PARM_NUMBER, 0));
+        BCMCLI_MAKE_CMD_NOPARM(dir, "disconn", "disconnect from switch daemon", kt2_disconn);
+        BCMCLI_MAKE_CMD(dir, "cmd", "command to switch - string between quotes", kt2_cmd,
+            BCMCLI_MAKE_PARM("", "", BCMCLI_PARM_STRING, 0));
+    }
+    return BCM_ERR_OK;
+}
+
diff --git a/bcm68620_release/release/host_customized/board/wrx/bcmolt_board_cli.h b/bcm68620_release/release/host_customized/board/wrx/bcmolt_board_cli.h
new file mode 100644
index 0000000..91a904a
--- /dev/null
+++ b/bcm68620_release/release/host_customized/board/wrx/bcmolt_board_cli.h
@@ -0,0 +1,39 @@
+/*
+<:copyright-BRCM:2016:DUAL/GPL:standard
+
+   Broadcom Proprietary and Confidential.(c) 2016 Broadcom
+   All Rights Reserved
+
+Unless you and Broadcom execute a separate written software license
+agreement governing use of this software, this software is licensed
+to you under the terms of the GNU General Public License version 2
+(the "GPL"), available at http://www.broadcom.com/licenses/GPLv2.php,
+with the following added to such license:
+
+   As a special exception, the copyright holders of this software give
+   you permission to link this software with independent modules, and
+   to copy and distribute the resulting executable under terms of your
+   choice, provided that you also meet, for each linked independent
+   module, the terms and conditions of the license of that module.
+   An independent module is a module which is not derived from this
+   software.  The special exception does not apply to any modifications
+   of the software.
+
+Not withstanding the above, under no circumstances may you combine
+this software in any way with any other Broadcom software provided
+under a license other than the GPL, without Broadcom's express prior
+written consent.
+
+:>
+ */
+
+#ifndef _BCMOLT_BOARD_CLI_H_
+#define _BCMOLT_BOARD_CLI_H_
+
+#include <bcmos_system.h>
+#include <bcmcli.h>
+
+bcmos_errno bcm_board_cli_init(bcmcli_entry *top_dir);
+
+#endif
+
diff --git a/bcm68620_release/release/host_customized/board/wrx/bcmolt_dpll_table.h b/bcm68620_release/release/host_customized/board/wrx/bcmolt_dpll_table.h
new file mode 100755
index 0000000..a7d610e
--- /dev/null
+++ b/bcm68620_release/release/host_customized/board/wrx/bcmolt_dpll_table.h
@@ -0,0 +1,1144 @@
+#ifndef _BCMOLT_DPLL_TABLE_H_
+#define _BCMOLT_DPLL_TABLE_H_
+
+/* auto generated loading files */
+
+static dpll_command gpon_dpll_table[] =
+{
+    {0x0B,0x24,0xD8},
+    {0x0B,0x25,0x00},
+    {0x00,0x0B,0x68},
+    {0x00,0x16,0x02},
+    {0x00,0x17,0x1C},
+    {0x00,0x18,0xEE},
+    {0x00,0x19,0xDD},
+    {0x00,0x1A,0xDF},
+    {0x00,0x2B,0x02},
+    {0x00,0x2C,0x01},
+    {0x00,0x2D,0x01},
+    {0x00,0x2E,0x6F},
+    {0x00,0x2F,0x00},
+    {0x00,0x30,0x00},
+    {0x00,0x31,0x00},
+    {0x00,0x32,0x00},
+    {0x00,0x33,0x00},
+    {0x00,0x34,0x00},
+    {0x00,0x35,0x00},
+    {0x00,0x36,0x6F},
+    {0x00,0x37,0x00},
+    {0x00,0x38,0x00},
+    {0x00,0x39,0x00},
+    {0x00,0x3A,0x00},
+    {0x00,0x3B,0x00},
+    {0x00,0x3C,0x00},
+    {0x00,0x3D,0x00},
+    {0x00,0x3F,0x11},
+    {0x00,0x40,0x04},
+    {0x00,0x41,0x0E},
+    {0x00,0x42,0x00},
+    {0x00,0x43,0x00},
+    {0x00,0x44,0x00},
+    {0x00,0x45,0x0C},
+    {0x00,0x46,0x32},
+    {0x00,0x47,0x00},
+    {0x00,0x48,0x00},
+    {0x00,0x49,0x00},
+    {0x00,0x4A,0x32},
+    {0x00,0x4B,0x00},
+    {0x00,0x4C,0x00},
+    {0x00,0x4D,0x00},
+    {0x00,0x4E,0x05},
+    {0x00,0x4F,0x00},
+    {0x00,0x51,0x03},
+    {0x00,0x52,0x00},
+    {0x00,0x53,0x00},
+    {0x00,0x54,0x00},
+    {0x00,0x55,0x03},
+    {0x00,0x56,0x00},
+    {0x00,0x57,0x00},
+    {0x00,0x58,0x00},
+    {0x00,0x59,0x03},
+    {0x00,0x5A,0x55},
+    {0x00,0x5B,0x55},
+    {0x00,0x5C,0xD0},
+    {0x00,0x5D,0x00},
+    {0x00,0x5E,0x00},
+    {0x00,0x5F,0x00},
+    {0x00,0x60,0x00},
+    {0x00,0x61,0x00},
+    {0x00,0x62,0x00},
+    {0x00,0x63,0x00},
+    {0x00,0x64,0x00},
+    {0x00,0x65,0x00},
+    {0x00,0x66,0x00},
+    {0x00,0x67,0x00},
+    {0x00,0x68,0x00},
+    {0x00,0x69,0x00},
+    {0x00,0x92,0x00},
+    {0x00,0x93,0x00},
+    {0x00,0x95,0x00},
+    {0x00,0x96,0x00},
+    {0x00,0x98,0x00},
+    {0x00,0x9A,0x02},
+    {0x00,0x9B,0x10},
+    {0x00,0x9D,0x00},
+    {0x00,0x9E,0x20},
+    {0x00,0xA0,0x00},
+    {0x00,0xA2,0x02},
+    {0x00,0xA8,0xC9},
+    {0x00,0xA9,0x62},
+    {0x00,0xAA,0x10},
+    {0x00,0xAB,0x00},
+    {0x00,0xAC,0x00},
+    {0x01,0x02,0x01},
+    {0x01,0x08,0x06},
+    {0x01,0x09,0x09},
+    {0x01,0x0A,0x6B},
+    {0x01,0x0B,0x00},
+    {0x01,0x0D,0x01},
+    {0x01,0x0E,0x09},
+    {0x01,0x0F,0x3B},
+    {0x01,0x10,0x00},
+    {0x01,0x12,0x06},
+    {0x01,0x13,0x09},
+    {0x01,0x14,0x6B},
+    {0x01,0x15,0x00},
+    {0x01,0x17,0x01},
+    {0x01,0x18,0x09},
+    {0x01,0x19,0x3B},
+    {0x01,0x1A,0x00},
+    {0x01,0x1C,0x06},
+    {0x01,0x1D,0x09},
+    {0x01,0x1E,0x6B},
+    {0x01,0x1F,0x00},
+    {0x01,0x21,0x01},
+    {0x01,0x22,0x09},
+    {0x01,0x23,0x3B},
+    {0x01,0x24,0x00},
+    {0x01,0x26,0x06},
+    {0x01,0x27,0x09},
+    {0x01,0x28,0x6B},
+    {0x01,0x29,0x00},
+    {0x01,0x2B,0x01},
+    {0x01,0x2C,0x09},
+    {0x01,0x2D,0x3B},
+    {0x01,0x2E,0x00},
+    {0x01,0x30,0x06},
+    {0x01,0x31,0x09},
+    {0x01,0x32,0x6B},
+    {0x01,0x33,0x00},
+    {0x01,0x3A,0x06},
+    {0x01,0x3B,0xCC},
+    {0x01,0x3C,0x00},
+    {0x01,0x3D,0x00},
+    {0x01,0x3F,0x00},
+    {0x01,0x40,0x00},
+    {0x01,0x41,0x40},
+    {0x01,0x42,0xFF},
+    {0x02,0x02,0x00},
+    {0x02,0x03,0x00},
+    {0x02,0x04,0x00},
+    {0x02,0x05,0x00},
+    {0x02,0x06,0x00},
+    {0x02,0x08,0x4F},
+    {0x02,0x09,0x00},
+    {0x02,0x0A,0x00},
+    {0x02,0x0B,0x00},
+    {0x02,0x0C,0x00},
+    {0x02,0x0D,0x00},
+    {0x02,0x0E,0x01},
+    {0x02,0x0F,0x00},
+    {0x02,0x10,0x00},
+    {0x02,0x11,0x00},
+    {0x02,0x12,0x00},
+    {0x02,0x13,0x00},
+    {0x02,0x14,0x00},
+    {0x02,0x15,0x00},
+    {0x02,0x16,0x00},
+    {0x02,0x17,0x00},
+    {0x02,0x18,0x00},
+    {0x02,0x19,0x00},
+    {0x02,0x1A,0x00},
+    {0x02,0x1B,0x00},
+    {0x02,0x1C,0x00},
+    {0x02,0x1D,0x00},
+    {0x02,0x1E,0x00},
+    {0x02,0x1F,0x00},
+    {0x02,0x20,0x00},
+    {0x02,0x21,0x00},
+    {0x02,0x22,0x00},
+    {0x02,0x23,0x00},
+    {0x02,0x24,0x00},
+    {0x02,0x25,0x00},
+    {0x02,0x26,0x00},
+    {0x02,0x27,0x00},
+    {0x02,0x28,0x00},
+    {0x02,0x29,0x00},
+    {0x02,0x2A,0x00},
+    {0x02,0x2B,0x00},
+    {0x02,0x2C,0x00},
+    {0x02,0x2D,0x00},
+    {0x02,0x2E,0x00},
+    {0x02,0x2F,0x00},
+    {0x02,0x31,0x03},
+    {0x02,0x32,0x03},
+    {0x02,0x33,0x03},
+    {0x02,0x34,0x03},
+    {0x02,0x35,0x00},
+    {0x02,0x36,0x00},
+    {0x02,0x37,0x00},
+    {0x02,0x38,0xC0},
+    {0x02,0x39,0xDE},
+    {0x02,0x3A,0x00},
+    {0x02,0x3B,0x00},
+    {0x02,0x3C,0x00},
+    {0x02,0x3D,0x00},
+    {0x02,0x3E,0xC8},
+    {0x02,0x4A,0x00},
+    {0x02,0x4B,0x00},
+    {0x02,0x4C,0x00},
+    {0x02,0x4D,0x00},
+    {0x02,0x4E,0x00},
+    {0x02,0x4F,0x00},
+    {0x02,0x50,0x00},
+    {0x02,0x51,0x00},
+    {0x02,0x52,0x00},
+    {0x02,0x53,0x00},
+    {0x02,0x54,0x00},
+    {0x02,0x55,0x00},
+    {0x02,0x56,0x00},
+    {0x02,0x57,0x00},
+    {0x02,0x58,0x00},
+    {0x02,0x59,0x00},
+    {0x02,0x5A,0x00},
+    {0x02,0x5B,0x00},
+    {0x02,0x5C,0x00},
+    {0x02,0x5D,0x00},
+    {0x02,0x5E,0x00},
+    {0x02,0x5F,0x00},
+    {0x02,0x60,0x00},
+    {0x02,0x61,0x00},
+    {0x02,0x62,0x00},
+    {0x02,0x63,0x00},
+    {0x02,0x64,0x00},
+    {0x02,0x68,0x00},
+    {0x02,0x69,0x00},
+    {0x02,0x6A,0x00},
+    {0x02,0x6B,0x47},
+    {0x02,0x6C,0x50},
+    {0x02,0x6D,0x4F},
+    {0x02,0x6E,0x4E},
+    {0x02,0x6F,0x5F},
+    {0x02,0x70,0x43},
+    {0x02,0x71,0x4C},
+    {0x02,0x72,0x4B},
+    {0x03,0x02,0x00},
+    {0x03,0x03,0x00},
+    {0x03,0x04,0x00},
+    {0x03,0x05,0x00},
+    {0x03,0x06,0x16},
+    {0x03,0x07,0x00},
+    {0x03,0x08,0x00},
+    {0x03,0x09,0x00},
+    {0x03,0x0A,0x00},
+    {0x03,0x0B,0x80},
+    {0x03,0x0D,0x00},
+    {0x03,0x0E,0x00},
+    {0x03,0x0F,0x00},
+    {0x03,0x10,0x00},
+    {0x03,0x11,0x00},
+    {0x03,0x12,0x00},
+    {0x03,0x13,0x00},
+    {0x03,0x14,0x00},
+    {0x03,0x15,0x00},
+    {0x03,0x16,0x00},
+    {0x03,0x18,0x00},
+    {0x03,0x19,0x00},
+    {0x03,0x1A,0x00},
+    {0x03,0x1B,0x00},
+    {0x03,0x1C,0x00},
+    {0x03,0x1D,0x00},
+    {0x03,0x1E,0x00},
+    {0x03,0x1F,0x00},
+    {0x03,0x20,0x00},
+    {0x03,0x21,0x00},
+    {0x03,0x23,0x00},
+    {0x03,0x24,0x00},
+    {0x03,0x25,0x00},
+    {0x03,0x26,0x00},
+    {0x03,0x27,0x00},
+    {0x03,0x28,0x00},
+    {0x03,0x29,0x00},
+    {0x03,0x2A,0x00},
+    {0x03,0x2B,0x00},
+    {0x03,0x2C,0x00},
+    {0x03,0x2E,0x00},
+    {0x03,0x2F,0x00},
+    {0x03,0x30,0x00},
+    {0x03,0x31,0x00},
+    {0x03,0x32,0x00},
+    {0x03,0x33,0x00},
+    {0x03,0x34,0x00},
+    {0x03,0x35,0x00},
+    {0x03,0x36,0x00},
+    {0x03,0x37,0x00},
+    {0x03,0x39,0x1F},
+    {0x03,0x3B,0x00},
+    {0x03,0x3C,0x00},
+    {0x03,0x3D,0x00},
+    {0x03,0x3E,0x00},
+    {0x03,0x3F,0x00},
+    {0x03,0x40,0x00},
+    {0x03,0x41,0x00},
+    {0x03,0x42,0x00},
+    {0x03,0x43,0x00},
+    {0x03,0x44,0x00},
+    {0x03,0x45,0x00},
+    {0x03,0x46,0x00},
+    {0x03,0x47,0x00},
+    {0x03,0x48,0x00},
+    {0x03,0x49,0x00},
+    {0x03,0x4A,0x00},
+    {0x03,0x4B,0x00},
+    {0x03,0x4C,0x00},
+    {0x03,0x4D,0x00},
+    {0x03,0x4E,0x00},
+    {0x03,0x4F,0x00},
+    {0x03,0x50,0x00},
+    {0x03,0x51,0x00},
+    {0x03,0x52,0x00},
+    {0x03,0x53,0x00},
+    {0x03,0x54,0x00},
+    {0x03,0x55,0x00},
+    {0x03,0x56,0x00},
+    {0x03,0x57,0x00},
+    {0x03,0x58,0x00},
+    {0x03,0x59,0x00},
+    {0x03,0x5A,0x00},
+    {0x03,0x5B,0x00},
+    {0x03,0x5C,0x00},
+    {0x03,0x5D,0x00},
+    {0x03,0x5E,0x00},
+    {0x03,0x5F,0x00},
+    {0x03,0x60,0x00},
+    {0x03,0x61,0x00},
+    {0x03,0x62,0x00},
+    {0x04,0x87,0x00},
+    {0x05,0x02,0x01},
+    {0x05,0x08,0x14},
+    {0x05,0x09,0x22},
+    {0x05,0x0A,0x0D},
+    {0x05,0x0B,0x0C},
+    {0x05,0x0C,0x01},
+    {0x05,0x0D,0x3F},
+    {0x05,0x0E,0x15},
+    {0x05,0x0F,0x26},
+    {0x05,0x10,0x0C},
+    {0x05,0x11,0x0B},
+    {0x05,0x12,0x01},
+    {0x05,0x13,0x3F},
+    {0x05,0x15,0x00},
+    {0x05,0x16,0x00},
+    {0x05,0x17,0x00},
+    {0x05,0x18,0xDF},
+    {0x05,0x19,0x38},
+    {0x05,0x1A,0x03},
+    {0x05,0x1B,0x00},
+    {0x05,0x1C,0x00},
+    {0x05,0x1D,0x80},
+    {0x05,0x1E,0x96},
+    {0x05,0x1F,0x98},
+    {0x05,0x21,0x33},
+    {0x05,0x2A,0x01},
+    {0x05,0x2B,0x01},
+    {0x05,0x2C,0x0F},
+    {0x05,0x2D,0x03},
+    {0x05,0x2E,0x19},
+    {0x05,0x2F,0x19},
+    {0x05,0x31,0x00},
+    {0x05,0x32,0x4B},
+    {0x05,0x33,0x03},
+    {0x05,0x34,0x00},
+    {0x05,0x36,0x0C},
+    {0x05,0x37,0x00},
+    {0x05,0x38,0x01},
+    {0x05,0x39,0x00},
+    {0x09,0x0E,0x02},
+    {0x09,0x43,0x01},
+    {0x09,0x49,0x01},
+    {0x09,0x4A,0x01},
+    {0x0A,0x02,0x00},
+    {0x0A,0x03,0x01},
+    {0x0A,0x04,0x01},
+    {0x0A,0x05,0x01},
+    {0x0B,0x44,0x0F},
+    {0x0B,0x46,0x00},
+    {0x0B,0x47,0x00},
+    {0x0B,0x48,0x0E},
+    {0x0B,0x4A,0x1E},
+    {0x05,0x14,0x01},
+    {0x00,0x1C,0x01},
+    {0x0B,0x24,0xDB},
+    {0x0B,0x25,0x02}
+};
+
+static dpll_command epon_dpll_table[] =
+{
+    {0x0B,0x24,0xD8},
+    {0x0B,0x25,0x00},
+    {0x00,0x0B,0x68},
+    {0x00,0x16,0x02},
+    {0x00,0x17,0x1C},
+    {0x00,0x18,0xEE},
+    {0x00,0x19,0xDD},
+    {0x00,0x1A,0xDF},
+    {0x00,0x2B,0x02},
+    {0x00,0x2C,0x01},
+    {0x00,0x2D,0x01},
+    {0x00,0x2E,0x70},
+    {0x00,0x2F,0x00},
+    {0x00,0x30,0x00},
+    {0x00,0x31,0x00},
+    {0x00,0x32,0x00},
+    {0x00,0x33,0x00},
+    {0x00,0x34,0x00},
+    {0x00,0x35,0x00},
+    {0x00,0x36,0x70},
+    {0x00,0x37,0x00},
+    {0x00,0x38,0x00},
+    {0x00,0x39,0x00},
+    {0x00,0x3A,0x00},
+    {0x00,0x3B,0x00},
+    {0x00,0x3C,0x00},
+    {0x00,0x3D,0x00},
+    {0x00,0x3F,0x11},
+    {0x00,0x40,0x04},
+    {0x00,0x41,0x0E},
+    {0x00,0x42,0x00},
+    {0x00,0x43,0x00},
+    {0x00,0x44,0x00},
+    {0x00,0x45,0x0C},
+    {0x00,0x46,0x32},
+    {0x00,0x47,0x00},
+    {0x00,0x48,0x00},
+    {0x00,0x49,0x00},
+    {0x00,0x4A,0x32},
+    {0x00,0x4B,0x00},
+    {0x00,0x4C,0x00},
+    {0x00,0x4D,0x00},
+    {0x00,0x4E,0x05},
+    {0x00,0x4F,0x00},
+    {0x00,0x51,0x03},
+    {0x00,0x52,0x00},
+    {0x00,0x53,0x00},
+    {0x00,0x54,0x00},
+    {0x00,0x55,0x03},
+    {0x00,0x56,0x00},
+    {0x00,0x57,0x00},
+    {0x00,0x58,0x00},
+    {0x00,0x59,0x03},
+    {0x00,0x5A,0x55},
+    {0x00,0x5B,0x55},
+    {0x00,0x5C,0xD0},
+    {0x00,0x5D,0x00},
+    {0x00,0x5E,0x00},
+    {0x00,0x5F,0x00},
+    {0x00,0x60,0x00},
+    {0x00,0x61,0x00},
+    {0x00,0x62,0x00},
+    {0x00,0x63,0x00},
+    {0x00,0x64,0x00},
+    {0x00,0x65,0x00},
+    {0x00,0x66,0x00},
+    {0x00,0x67,0x00},
+    {0x00,0x68,0x00},
+    {0x00,0x69,0x00},
+    {0x00,0x92,0x00},
+    {0x00,0x93,0x00},
+    {0x00,0x95,0x00},
+    {0x00,0x96,0x00},
+    {0x00,0x98,0x00},
+    {0x00,0x9A,0x02},
+    {0x00,0x9B,0x10},
+    {0x00,0x9D,0x00},
+    {0x00,0x9E,0x20},
+    {0x00,0xA0,0x00},
+    {0x00,0xA2,0x02},
+    {0x00,0xA8,0x1E},
+    {0x00,0xA9,0x94},
+    {0x00,0xAA,0x10},
+    {0x00,0xAB,0x00},
+    {0x00,0xAC,0x00},
+    {0x01,0x02,0x01},
+    {0x01,0x08,0x06},
+    {0x01,0x09,0x09},
+    {0x01,0x0A,0x6B},
+    {0x01,0x0B,0x00},
+    {0x01,0x0D,0x01},
+    {0x01,0x0E,0x09},
+    {0x01,0x0F,0x3B},
+    {0x01,0x10,0x00},
+    {0x01,0x12,0x06},
+    {0x01,0x13,0x09},
+    {0x01,0x14,0x6B},
+    {0x01,0x15,0x00},
+    {0x01,0x17,0x01},
+    {0x01,0x18,0x09},
+    {0x01,0x19,0x3B},
+    {0x01,0x1A,0x00},
+    {0x01,0x1C,0x06},
+    {0x01,0x1D,0x09},
+    {0x01,0x1E,0x6B},
+    {0x01,0x1F,0x00},
+    {0x01,0x21,0x01},
+    {0x01,0x22,0x09},
+    {0x01,0x23,0x3B},
+    {0x01,0x24,0x00},
+    {0x01,0x26,0x06},
+    {0x01,0x27,0x09},
+    {0x01,0x28,0x6B},
+    {0x01,0x29,0x00},
+    {0x01,0x2B,0x01},
+    {0x01,0x2C,0x09},
+    {0x01,0x2D,0x3B},
+    {0x01,0x2E,0x00},
+    {0x01,0x30,0x06},
+    {0x01,0x31,0x09},
+    {0x01,0x32,0x6B},
+    {0x01,0x33,0x00},
+    {0x01,0x3A,0x06},
+    {0x01,0x3B,0xCC},
+    {0x01,0x3C,0x00},
+    {0x01,0x3D,0x00},
+    {0x01,0x3F,0x00},
+    {0x01,0x40,0x00},
+    {0x01,0x41,0x40},
+    {0x01,0x42,0xFF},
+    {0x02,0x02,0x00},
+    {0x02,0x03,0x00},
+    {0x02,0x04,0x00},
+    {0x02,0x05,0x00},
+    {0x02,0x06,0x00},
+    {0x02,0x08,0x4F},
+    {0x02,0x09,0x00},
+    {0x02,0x0A,0x00},
+    {0x02,0x0B,0x00},
+    {0x02,0x0C,0x00},
+    {0x02,0x0D,0x00},
+    {0x02,0x0E,0x01},
+    {0x02,0x0F,0x00},
+    {0x02,0x10,0x00},
+    {0x02,0x11,0x00},
+    {0x02,0x12,0x00},
+    {0x02,0x13,0x00},
+    {0x02,0x14,0x00},
+    {0x02,0x15,0x00},
+    {0x02,0x16,0x00},
+    {0x02,0x17,0x00},
+    {0x02,0x18,0x00},
+    {0x02,0x19,0x00},
+    {0x02,0x1A,0x00},
+    {0x02,0x1B,0x00},
+    {0x02,0x1C,0x00},
+    {0x02,0x1D,0x00},
+    {0x02,0x1E,0x00},
+    {0x02,0x1F,0x00},
+    {0x02,0x20,0x00},
+    {0x02,0x21,0x00},
+    {0x02,0x22,0x00},
+    {0x02,0x23,0x00},
+    {0x02,0x24,0x00},
+    {0x02,0x25,0x00},
+    {0x02,0x26,0x00},
+    {0x02,0x27,0x00},
+    {0x02,0x28,0x00},
+    {0x02,0x29,0x00},
+    {0x02,0x2A,0x00},
+    {0x02,0x2B,0x00},
+    {0x02,0x2C,0x00},
+    {0x02,0x2D,0x00},
+    {0x02,0x2E,0x00},
+    {0x02,0x2F,0x00},
+    {0x02,0x31,0x03},
+    {0x02,0x32,0x03},
+    {0x02,0x33,0x03},
+    {0x02,0x34,0x03},
+    {0x02,0x35,0x00},
+    {0x02,0x36,0x00},
+    {0x02,0x37,0x00},
+    {0x02,0x38,0xD8},
+    {0x02,0x39,0xD6},
+    {0x02,0x3A,0x00},
+    {0x02,0x3B,0x00},
+    {0x02,0x3C,0x00},
+    {0x02,0x3D,0x00},
+    {0x02,0x3E,0xC0},
+    {0x02,0x4A,0x00},
+    {0x02,0x4B,0x00},
+    {0x02,0x4C,0x00},
+    {0x02,0x4D,0x00},
+    {0x02,0x4E,0x00},
+    {0x02,0x4F,0x00},
+    {0x02,0x50,0x00},
+    {0x02,0x51,0x00},
+    {0x02,0x52,0x00},
+    {0x02,0x53,0x00},
+    {0x02,0x54,0x00},
+    {0x02,0x55,0x00},
+    {0x02,0x56,0x00},
+    {0x02,0x57,0x00},
+    {0x02,0x58,0x00},
+    {0x02,0x59,0x00},
+    {0x02,0x5A,0x00},
+    {0x02,0x5B,0x00},
+    {0x02,0x5C,0x00},
+    {0x02,0x5D,0x00},
+    {0x02,0x5E,0x00},
+    {0x02,0x5F,0x00},
+    {0x02,0x60,0x00},
+    {0x02,0x61,0x00},
+    {0x02,0x62,0x00},
+    {0x02,0x63,0x00},
+    {0x02,0x64,0x00},
+    {0x02,0x68,0x00},
+    {0x02,0x69,0x00},
+    {0x02,0x6A,0x00},
+    {0x02,0x6B,0x45},
+    {0x02,0x6C,0x50},
+    {0x02,0x6D,0x4F},
+    {0x02,0x6E,0x4E},
+    {0x02,0x6F,0x5F},
+    {0x02,0x70,0x43},
+    {0x02,0x71,0x4C},
+    {0x02,0x72,0x4B},
+    {0x03,0x02,0x00},
+    {0x03,0x03,0x00},
+    {0x03,0x04,0x00},
+    {0x03,0x05,0x00},
+    {0x03,0x06,0x16},
+    {0x03,0x07,0x00},
+    {0x03,0x08,0x00},
+    {0x03,0x09,0x00},
+    {0x03,0x0A,0x00},
+    {0x03,0x0B,0x80},
+    {0x03,0x0D,0x00},
+    {0x03,0x0E,0x00},
+    {0x03,0x0F,0x00},
+    {0x03,0x10,0x00},
+    {0x03,0x11,0x00},
+    {0x03,0x12,0x00},
+    {0x03,0x13,0x00},
+    {0x03,0x14,0x00},
+    {0x03,0x15,0x00},
+    {0x03,0x16,0x00},
+    {0x03,0x18,0x00},
+    {0x03,0x19,0x00},
+    {0x03,0x1A,0x00},
+    {0x03,0x1B,0x00},
+    {0x03,0x1C,0x00},
+    {0x03,0x1D,0x00},
+    {0x03,0x1E,0x00},
+    {0x03,0x1F,0x00},
+    {0x03,0x20,0x00},
+    {0x03,0x21,0x00},
+    {0x03,0x23,0x00},
+    {0x03,0x24,0x00},
+    {0x03,0x25,0x00},
+    {0x03,0x26,0x00},
+    {0x03,0x27,0x00},
+    {0x03,0x28,0x00},
+    {0x03,0x29,0x00},
+    {0x03,0x2A,0x00},
+    {0x03,0x2B,0x00},
+    {0x03,0x2C,0x00},
+    {0x03,0x2E,0x00},
+    {0x03,0x2F,0x00},
+    {0x03,0x30,0x00},
+    {0x03,0x31,0x00},
+    {0x03,0x32,0x00},
+    {0x03,0x33,0x00},
+    {0x03,0x34,0x00},
+    {0x03,0x35,0x00},
+    {0x03,0x36,0x00},
+    {0x03,0x37,0x00},
+    {0x03,0x39,0x1F},
+    {0x03,0x3B,0x00},
+    {0x03,0x3C,0x00},
+    {0x03,0x3D,0x00},
+    {0x03,0x3E,0x00},
+    {0x03,0x3F,0x00},
+    {0x03,0x40,0x00},
+    {0x03,0x41,0x00},
+    {0x03,0x42,0x00},
+    {0x03,0x43,0x00},
+    {0x03,0x44,0x00},
+    {0x03,0x45,0x00},
+    {0x03,0x46,0x00},
+    {0x03,0x47,0x00},
+    {0x03,0x48,0x00},
+    {0x03,0x49,0x00},
+    {0x03,0x4A,0x00},
+    {0x03,0x4B,0x00},
+    {0x03,0x4C,0x00},
+    {0x03,0x4D,0x00},
+    {0x03,0x4E,0x00},
+    {0x03,0x4F,0x00},
+    {0x03,0x50,0x00},
+    {0x03,0x51,0x00},
+    {0x03,0x52,0x00},
+    {0x03,0x53,0x00},
+    {0x03,0x54,0x00},
+    {0x03,0x55,0x00},
+    {0x03,0x56,0x00},
+    {0x03,0x57,0x00},
+    {0x03,0x58,0x00},
+    {0x03,0x59,0x00},
+    {0x03,0x5A,0x00},
+    {0x03,0x5B,0x00},
+    {0x03,0x5C,0x00},
+    {0x03,0x5D,0x00},
+    {0x03,0x5E,0x00},
+    {0x03,0x5F,0x00},
+    {0x03,0x60,0x00},
+    {0x03,0x61,0x00},
+    {0x03,0x62,0x00},
+    {0x04,0x87,0x00},
+    {0x05,0x02,0x01},
+    {0x05,0x08,0x14},
+    {0x05,0x09,0x22},
+    {0x05,0x0A,0x0D},
+    {0x05,0x0B,0x0C},
+    {0x05,0x0C,0x01},
+    {0x05,0x0D,0x3F},
+    {0x05,0x0E,0x15},
+    {0x05,0x0F,0x26},
+    {0x05,0x10,0x0C},
+    {0x05,0x11,0x0B},
+    {0x05,0x12,0x01},
+    {0x05,0x13,0x3F},
+    {0x05,0x15,0x00},
+    {0x05,0x16,0x00},
+    {0x05,0x17,0x00},
+    {0x05,0x18,0x00},
+    {0x05,0x19,0x65},
+    {0x05,0x1A,0x03},
+    {0x05,0x1B,0x00},
+    {0x05,0x1C,0x00},
+    {0x05,0x1D,0x00},
+    {0x05,0x1E,0x00},
+    {0x05,0x1F,0xA0},
+    {0x05,0x21,0x33},
+    {0x05,0x2A,0x01},
+    {0x05,0x2B,0x01},
+    {0x05,0x2C,0x0F},
+    {0x05,0x2D,0x03},
+    {0x05,0x2E,0x19},
+    {0x05,0x2F,0x19},
+    {0x05,0x31,0x00},
+    {0x05,0x32,0x4B},
+    {0x05,0x33,0x03},
+    {0x05,0x34,0x00},
+    {0x05,0x36,0x0C},
+    {0x05,0x37,0x00},
+    {0x05,0x38,0x01},
+    {0x05,0x39,0x00},
+    {0x09,0x0E,0x02},
+    {0x09,0x43,0x01},
+    {0x09,0x49,0x01},
+    {0x09,0x4A,0x01},
+    {0x0A,0x02,0x00},
+    {0x0A,0x03,0x01},
+    {0x0A,0x04,0x01},
+    {0x0A,0x05,0x01},
+    {0x0B,0x44,0x0F},
+    {0x0B,0x46,0x00},
+    {0x0B,0x47,0x00},
+    {0x0B,0x48,0x0E},
+    {0x0B,0x4A,0x1E},
+    {0x05,0x14,0x01},
+    {0x00,0x1C,0x01},
+    {0x0B,0x24,0xDB},
+    {0x0B,0x25,0x02}
+};
+
+static dpll_command gpon_synce_dpll_table[] =
+{
+    {0x0B,0x24,0xD8},
+    {0x0B,0x25,0x00},
+    {0x00,0x0B,0x68},
+    {0x00,0x16,0x02},
+    {0x00,0x17,0x1C},
+    {0x00,0x18,0xCC},
+    {0x00,0x19,0xDD},
+    {0x00,0x1A,0xDF},
+    {0x00,0x2B,0x02},
+    {0x00,0x2C,0x03},
+    {0x00,0x2D,0x05},
+    {0x00,0x2E,0x6E},
+    {0x00,0x2F,0x00},
+    {0x00,0x30,0x37},
+    {0x00,0x31,0x00},
+    {0x00,0x32,0x00},
+    {0x00,0x33,0x00},
+    {0x00,0x34,0x00},
+    {0x00,0x35,0x00},
+    {0x00,0x36,0x6E},
+    {0x00,0x37,0x00},
+    {0x00,0x38,0x37},
+    {0x00,0x39,0x00},
+    {0x00,0x3A,0x00},
+    {0x00,0x3B,0x00},
+    {0x00,0x3C,0x00},
+    {0x00,0x3D,0x00},
+    {0x00,0x3F,0x33},
+    {0x00,0x40,0x04},
+    {0x00,0x41,0x0E},
+    {0x00,0x42,0x0A},
+    {0x00,0x43,0x00},
+    {0x00,0x44,0x00},
+    {0x00,0x45,0x0C},
+    {0x00,0x46,0x32},
+    {0x00,0x47,0x32},
+    {0x00,0x48,0x00},
+    {0x00,0x49,0x00},
+    {0x00,0x4A,0x32},
+    {0x00,0x4B,0x32},
+    {0x00,0x4C,0x00},
+    {0x00,0x4D,0x00},
+    {0x00,0x4E,0x55},
+    {0x00,0x4F,0x00},
+    {0x00,0x51,0x03},
+    {0x00,0x52,0x03},
+    {0x00,0x53,0x00},
+    {0x00,0x54,0x00},
+    {0x00,0x55,0x03},
+    {0x00,0x56,0x03},
+    {0x00,0x57,0x00},
+    {0x00,0x58,0x00},
+    {0x00,0x59,0x0F},
+    {0x00,0x5A,0x55},
+    {0x00,0x5B,0x55},
+    {0x00,0x5C,0xD0},
+    {0x00,0x5D,0x00},
+    {0x00,0x5E,0x55},
+    {0x00,0x5F,0x55},
+    {0x00,0x60,0xD5},
+    {0x00,0x61,0x00},
+    {0x00,0x62,0x00},
+    {0x00,0x63,0x00},
+    {0x00,0x64,0x00},
+    {0x00,0x65,0x00},
+    {0x00,0x66,0x00},
+    {0x00,0x67,0x00},
+    {0x00,0x68,0x00},
+    {0x00,0x69,0x00},
+    {0x00,0x92,0x00},
+    {0x00,0x93,0x00},
+    {0x00,0x95,0x00},
+    {0x00,0x96,0x00},
+    {0x00,0x98,0x00},
+    {0x00,0x9A,0x02},
+    {0x00,0x9B,0x00},
+    {0x00,0x9D,0x00},
+    {0x00,0x9E,0x60},
+    {0x00,0xA0,0x40},
+    {0x00,0xA2,0x02},
+    {0x00,0xA8,0xB7},
+    {0x00,0xA9,0x28},
+    {0x00,0xAA,0x10},
+    {0x00,0xAB,0x00},
+    {0x00,0xAC,0x00},
+    {0x01,0x02,0x01},
+    {0x01,0x08,0x06},
+    {0x01,0x09,0x09},
+    {0x01,0x0A,0x6B},
+    {0x01,0x0B,0x00},
+    {0x01,0x0D,0x01},
+    {0x01,0x0E,0x09},
+    {0x01,0x0F,0x3B},
+    {0x01,0x10,0x00},
+    {0x01,0x12,0x06},
+    {0x01,0x13,0x09},
+    {0x01,0x14,0x6B},
+    {0x01,0x15,0x00},
+    {0x01,0x17,0x01},
+    {0x01,0x18,0x09},
+    {0x01,0x19,0x3B},
+    {0x01,0x1A,0x00},
+    {0x01,0x1C,0x06},
+    {0x01,0x1D,0x09},
+    {0x01,0x1E,0x6B},
+    {0x01,0x1F,0x00},
+    {0x01,0x21,0x01},
+    {0x01,0x22,0x09},
+    {0x01,0x23,0x3B},
+    {0x01,0x24,0x00},
+    {0x01,0x26,0x06},
+    {0x01,0x27,0x09},
+    {0x01,0x28,0x6B},
+    {0x01,0x29,0x00},
+    {0x01,0x2B,0x01},
+    {0x01,0x2C,0x09},
+    {0x01,0x2D,0x3B},
+    {0x01,0x2E,0x00},
+    {0x01,0x30,0x06},
+    {0x01,0x31,0x09},
+    {0x01,0x32,0x6B},
+    {0x01,0x33,0x00},
+    {0x01,0x3A,0x06},
+    {0x01,0x3B,0xCC},
+    {0x01,0x3C,0x00},
+    {0x01,0x3D,0x00},
+    {0x01,0x3F,0x00},
+    {0x01,0x40,0x00},
+    {0x01,0x41,0x40},
+    {0x01,0x42,0xFF},
+    {0x02,0x02,0x00},
+    {0x02,0x03,0x00},
+    {0x02,0x04,0x00},
+    {0x02,0x05,0x00},
+    {0x02,0x06,0x00},
+    {0x02,0x08,0xDB},
+    {0x02,0x09,0x1A},
+    {0x02,0x0A,0x00},
+    {0x02,0x0B,0xC4},
+    {0x02,0x0C,0x09},
+    {0x02,0x0D,0x00},
+    {0x02,0x0E,0x00},
+    {0x02,0x0F,0x00},
+    {0x02,0x10,0x00},
+    {0x02,0x11,0x20},
+    {0x02,0x12,0x37},
+    {0x02,0x13,0x00},
+    {0x02,0x14,0x00},
+    {0x02,0x15,0x14},
+    {0x02,0x16,0x00},
+    {0x02,0x17,0x00},
+    {0x02,0x18,0x00},
+    {0x02,0x19,0x00},
+    {0x02,0x1A,0x00},
+    {0x02,0x1B,0x04},
+    {0x02,0x1C,0x00},
+    {0x02,0x1D,0x00},
+    {0x02,0x1E,0x00},
+    {0x02,0x1F,0x00},
+    {0x02,0x20,0x00},
+    {0x02,0x21,0x00},
+    {0x02,0x22,0x00},
+    {0x02,0x23,0x00},
+    {0x02,0x24,0x00},
+    {0x02,0x25,0x00},
+    {0x02,0x26,0x00},
+    {0x02,0x27,0x00},
+    {0x02,0x28,0x00},
+    {0x02,0x29,0x00},
+    {0x02,0x2A,0x00},
+    {0x02,0x2B,0x00},
+    {0x02,0x2C,0x00},
+    {0x02,0x2D,0x00},
+    {0x02,0x2E,0x00},
+    {0x02,0x2F,0x00},
+    {0x02,0x31,0x11},
+    {0x02,0x32,0x11},
+    {0x02,0x33,0x01},
+    {0x02,0x34,0x01},
+    {0x02,0x35,0x00},
+    {0x02,0x36,0x00},
+    {0x02,0x37,0x00},
+    {0x02,0x38,0xC0},
+    {0x02,0x39,0xDE},
+    {0x02,0x3A,0x00},
+    {0x02,0x3B,0x00},
+    {0x02,0x3C,0x00},
+    {0x02,0x3D,0x00},
+    {0x02,0x3E,0xC8},
+    {0x02,0x4A,0x00},
+    {0x02,0x4B,0x00},
+    {0x02,0x4C,0x00},
+    {0x02,0x4D,0x00},
+    {0x02,0x4E,0x00},
+    {0x02,0x4F,0x00},
+    {0x02,0x50,0x00},
+    {0x02,0x51,0x00},
+    {0x02,0x52,0x00},
+    {0x02,0x53,0x00},
+    {0x02,0x54,0x00},
+    {0x02,0x55,0x00},
+    {0x02,0x56,0x00},
+    {0x02,0x57,0x00},
+    {0x02,0x58,0x00},
+    {0x02,0x59,0x00},
+    {0x02,0x5A,0x00},
+    {0x02,0x5B,0x00},
+    {0x02,0x5C,0x00},
+    {0x02,0x5D,0x00},
+    {0x02,0x5E,0x00},
+    {0x02,0x5F,0x00},
+    {0x02,0x60,0x00},
+    {0x02,0x61,0x00},
+    {0x02,0x62,0x00},
+    {0x02,0x63,0x00},
+    {0x02,0x64,0x00},
+    {0x02,0x68,0x00},
+    {0x02,0x69,0x00},
+    {0x02,0x6A,0x00},
+    {0x02,0x6B,0x47},
+    {0x02,0x6C,0x50},
+    {0x02,0x6D,0x4F},
+    {0x02,0x6E,0x4E},
+    {0x02,0x6F,0x5F},
+    {0x02,0x70,0x43},
+    {0x02,0x71,0x4C},
+    {0x02,0x72,0x4B},
+    {0x03,0x02,0x00},
+    {0x03,0x03,0x00},
+    {0x03,0x04,0x00},
+    {0x03,0x05,0x00},
+    {0x03,0x06,0x16},
+    {0x03,0x07,0x00},
+    {0x03,0x08,0x00},
+    {0x03,0x09,0x00},
+    {0x03,0x0A,0x00},
+    {0x03,0x0B,0x80},
+    {0x03,0x0D,0x00},
+    {0x03,0x0E,0x00},
+    {0x03,0x0F,0x00},
+    {0x03,0x10,0x00},
+    {0x03,0x11,0x00},
+    {0x03,0x12,0x00},
+    {0x03,0x13,0x00},
+    {0x03,0x14,0x00},
+    {0x03,0x15,0x00},
+    {0x03,0x16,0x00},
+    {0x03,0x18,0x00},
+    {0x03,0x19,0x00},
+    {0x03,0x1A,0x00},
+    {0x03,0x1B,0x00},
+    {0x03,0x1C,0x00},
+    {0x03,0x1D,0x00},
+    {0x03,0x1E,0x00},
+    {0x03,0x1F,0x00},
+    {0x03,0x20,0x00},
+    {0x03,0x21,0x00},
+    {0x03,0x23,0x00},
+    {0x03,0x24,0x00},
+    {0x03,0x25,0x00},
+    {0x03,0x26,0x00},
+    {0x03,0x27,0x00},
+    {0x03,0x28,0x00},
+    {0x03,0x29,0x00},
+    {0x03,0x2A,0x00},
+    {0x03,0x2B,0x00},
+    {0x03,0x2C,0x00},
+    {0x03,0x2E,0x00},
+    {0x03,0x2F,0x00},
+    {0x03,0x30,0x00},
+    {0x03,0x31,0x00},
+    {0x03,0x32,0x00},
+    {0x03,0x33,0x00},
+    {0x03,0x34,0x00},
+    {0x03,0x35,0x00},
+    {0x03,0x36,0x00},
+    {0x03,0x37,0x00},
+    {0x03,0x39,0x1F},
+    {0x03,0x3B,0x00},
+    {0x03,0x3C,0x00},
+    {0x03,0x3D,0x00},
+    {0x03,0x3E,0x00},
+    {0x03,0x3F,0x00},
+    {0x03,0x40,0x00},
+    {0x03,0x41,0x00},
+    {0x03,0x42,0x00},
+    {0x03,0x43,0x00},
+    {0x03,0x44,0x00},
+    {0x03,0x45,0x00},
+    {0x03,0x46,0x00},
+    {0x03,0x47,0x00},
+    {0x03,0x48,0x00},
+    {0x03,0x49,0x00},
+    {0x03,0x4A,0x00},
+    {0x03,0x4B,0x00},
+    {0x03,0x4C,0x00},
+    {0x03,0x4D,0x00},
+    {0x03,0x4E,0x00},
+    {0x03,0x4F,0x00},
+    {0x03,0x50,0x00},
+    {0x03,0x51,0x00},
+    {0x03,0x52,0x00},
+    {0x03,0x53,0x00},
+    {0x03,0x54,0x00},
+    {0x03,0x55,0x00},
+    {0x03,0x56,0x00},
+    {0x03,0x57,0x00},
+    {0x03,0x58,0x00},
+    {0x03,0x59,0x00},
+    {0x03,0x5A,0x00},
+    {0x03,0x5B,0x00},
+    {0x03,0x5C,0x00},
+    {0x03,0x5D,0x00},
+    {0x03,0x5E,0x00},
+    {0x03,0x5F,0x00},
+    {0x03,0x60,0x00},
+    {0x03,0x61,0x00},
+    {0x03,0x62,0x00},
+    {0x04,0x87,0x00},
+    {0x05,0x02,0x01},
+    {0x05,0x08,0x14},
+    {0x05,0x09,0x22},
+    {0x05,0x0A,0x0D},
+    {0x05,0x0B,0x0C},
+    {0x05,0x0C,0x01},
+    {0x05,0x0D,0x3F},
+    {0x05,0x0E,0x15},
+    {0x05,0x0F,0x26},
+    {0x05,0x10,0x0C},
+    {0x05,0x11,0x0B},
+    {0x05,0x12,0x01},
+    {0x05,0x13,0x3F},
+    {0x05,0x15,0x00},
+    {0x05,0x16,0xB8},
+    {0x05,0x17,0xC1},
+    {0x05,0x18,0x49},
+    {0x05,0x19,0xAC},
+    {0x05,0x1A,0x02},
+    {0x05,0x1B,0x00},
+    {0x05,0x1C,0x00},
+    {0x05,0x1D,0x00},
+    {0x05,0x1E,0x00},
+    {0x05,0x1F,0x80},
+    {0x05,0x21,0x31},
+    {0x05,0x2A,0x00},
+    {0x05,0x2B,0x01},
+    {0x05,0x2C,0x0F},
+    {0x05,0x2D,0x03},
+    {0x05,0x2E,0x19},
+    {0x05,0x2F,0x19},
+    {0x05,0x31,0x00},
+    {0x05,0x32,0x42},
+    {0x05,0x33,0x03},
+    {0x05,0x34,0x00},
+    {0x05,0x36,0x0C},
+    {0x05,0x37,0x00},
+    {0x05,0x38,0x21},
+    {0x05,0x39,0x00},
+    {0x09,0x0E,0x02},
+    {0x09,0x43,0x01},
+    {0x09,0x49,0x03},
+    {0x09,0x4A,0x03},
+    {0x0A,0x02,0x00},
+    {0x0A,0x03,0x01},
+    {0x0A,0x04,0x01},
+    {0x0A,0x05,0x01},
+    {0x0B,0x44,0x0C},
+    {0x0B,0x46,0x00},
+    {0x0B,0x47,0x00},
+    {0x0B,0x48,0x0C},
+    {0x0B,0x4A,0x1E},
+    {0x05,0x14,0x01},
+    {0x00,0x1C,0x01},
+    {0x0B,0x24,0xDB},
+    {0x0B,0x25,0x02}
+}; 
+
+#endif
+
diff --git a/bcm68620_release/release/host_customized/board/wrx/fs/i2c_addrs.sh b/bcm68620_release/release/host_customized/board/wrx/fs/i2c_addrs.sh
new file mode 100755
index 0000000..643fd4c
--- /dev/null
+++ b/bcm68620_release/release/host_customized/board/wrx/fs/i2c_addrs.sh
@@ -0,0 +1,4 @@
+#! /bin/bash
+
+# Body will be inserted here by copy_host_fs target in project's main Makefile
+
diff --git a/bcm68620_release/release/host_customized/board/wrx/fs/svk_init.sh b/bcm68620_release/release/host_customized/board/wrx/fs/svk_init.sh
new file mode 100755
index 0000000..c1eece0
--- /dev/null
+++ b/bcm68620_release/release/host_customized/board/wrx/fs/svk_init.sh
@@ -0,0 +1,156 @@
+#! /bin/bash
+cd /opt/bcm68620
+
+# These files are mounted using tmpfs, so they will be deleted upon reboot
+LOCK_DIR_INIT=/tmp/bcm68620_svk_init
+FILE_INIT_DONE="$LOCK_DIR_INIT/done"
+LOCK_DIR_KERNEL_LOG_OWNED=/tmp/bcm68620_kernel_log_owned
+
+USER_APPL_ARGS=""
+KT2_PORT=""
+SWKT2_PORT=""
+KERNEL_LOG="y"
+COOP_DBA="n"
+
+while (($#)); do
+    case "$1" in
+    --kt2)
+        shift
+        KT2_PORT="$1"
+        ;;
+    --swkt2)
+        shift
+        SWKT2_PORT="$1"
+        ;;
+    --proxy) # for backward compatibility (could just use '-proxy')
+        shift
+        USER_APPL_ARGS="$USER_APPL_ARGS -proxy $1"
+        ;;
+    -nl)
+        KERNEL_LOG="n"
+        USER_APPL_ARGS="$USER_APPL_ARGS $1"
+        ;;
+    -coop_dba)
+        COOP_DBA="y"
+        ;;
+    *)
+        USER_APPL_ARGS="$USER_APPL_ARGS $1"
+        ;;
+    esac
+    shift
+done
+
+# Check if the initialization steps (installing kernel modules, etc) have already been done.
+# If not, start the initialization process.
+if mkdir "$LOCK_DIR_INIT" 2>/dev/null; then
+    trap "rmdir \"$LOCK_DIR_INIT\"" EXIT
+    echo "Initializing BCM68620 SVK..."
+
+    insmod ll_pcie.ko
+    sleep 1
+
+    insmod os_linux.ko
+    sleep 1
+
+    source ./i2c_addrs.sh
+    insmod i2c_devs.ko
+    sleep 1
+
+    function probe_dev
+    {
+        2>/dev/null echo maple_i2c 0x$1 > /sys/bus/i2c/devices/i2c-0/new_device
+    }
+
+    # Suppress error warnings in case device cannot be probed because it is inexistent.
+    dmesg -n 1
+    probe_dev $I2C_SW0_I2C_ADDR
+    probe_dev $I2C_SW1_I2C_ADDR
+    probe_dev $I2C_SW2_I2C_ADDR
+    probe_dev $I2C_SW3_I2C_ADDR
+    probe_dev $I2C_SW4_I2C_ADDR
+    probe_dev $SFP_I2C_ADDR1
+    probe_dev $SFP_I2C_ADDR2
+    probe_dev $FPGA_I2C_ADDR
+    probe_dev $PON_DPLL_I2C_ADDR
+    probe_dev $PM_DPLL_I2C_ADDR
+    probe_dev $CXP_T_I2C_ADDR
+    probe_dev $CXP_R_I2C_ADDR
+    probe_dev $PCIE_SW_I2C_ADDR
+    dmesg -n 8
+
+    rm -f /dev/maple_i2c
+    mknod /dev/maple_i2c c `cat /sys/module/i2c_devs/parameters/maple_i2c_chrdev_major` 0
+
+    if [ "$KT2_PORT" != "" ]; then
+        echo k 1 > /proc/maple_i2c/i2c
+        insmod linux-kernel-bde.ko
+        sleep 1
+        cat /proc/linux-kernel-bde
+        sleep 1
+        insmod linux-uk-proxy.ko
+        sleep 1
+        mknod /dev/linux-uk-proxy c 125 0
+        sleep 1
+        insmod linux-bcm-diag-full.ko
+        sleep 1
+        echo "KT2 will wait on port $KT2_PORT"
+        ./bcm.user.proxy -d $KT2_PORT &
+    fi
+
+    if [ "$SWKT2_PORT" != "" ]; then
+        echo "SW KT2 init"
+        insmod linux-kernel-bde.ko
+        sleep 1
+        cat /proc/linux-kernel-bde
+        sleep 1
+        insmod linux-uk-proxy.ko
+        sleep 1
+        mknod /dev/linux-uk-proxy c 125 0
+        sleep 1
+        insmod linux-bcm-diag-full.ko
+        sleep 1
+        echo "KT2 will wait on port $SWKT2_PORT"
+        ./bcm.user.proxy -d $SWKT2_PORT &
+    fi
+
+    insmod bcm_dev_ctrl_linux.ko
+    sleep 1
+    
+    if [ "$COOP_DBA" != "n" ]; then
+        insmod coop_dba_linux.ko
+        sleep 1
+    fi
+    
+    rm -f /dev/bcm_log
+    mknod /dev/bcm_log c `cat /sys/module/bcm_dev_ctrl_linux/parameters/dev_log_chrdev_major` 0
+    mknod /dev/maple_dev_ctrl c `cat /sys/module/bcm_dev_ctrl_linux/parameters/maple_dev_ctrl_chrdev_major` 0
+
+    touch "$FILE_INIT_DONE"
+    trap - EXIT
+else
+    if [ -f "$FILE_INIT_DONE" ]; then
+        echo "Skipped BCM68620 SVK initialization since it has already been done"
+    else
+        echo "Waiting for SVK initialization to complete..."
+        while [ ! -f "$FILE_INIT_DONE" ]; do
+            sleep 1
+        done
+    fi
+fi
+
+# Only one application can have the kernel logger enabled at once.
+# If someone else already owns the kernel logger, run without it.
+if [ "$KERNEL_LOG" == "y" ]; then
+    if mkdir "$LOCK_DIR_KERNEL_LOG_OWNED" 2>/dev/null; then
+        trap "rmdir \"$LOCK_DIR_KERNEL_LOG_OWNED\"" EXIT
+    else
+        USER_APPL_ARGS="$USER_APPL_ARGS -nl"
+        echo "Running without kernel logger since someone else owns it"
+    fi
+fi
+
+#echo "In Band: Launching BCM68620 user space device control application "
+#./bcm_dev_ctrl_user > /dev/null 2>&1 &
+
+echo "Launching BCM68620 user application with options \"$USER_APPL_ARGS\""
+./bcm_user_appl $USER_APPL_ARGS